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Commit f69a63c6 authored by David Collins's avatar David Collins
Browse files

ARM: dts: msm: add VDD_APCC CPR boost corner for msm8996pro



Add VDD_APCC CPR boost corner which corresponds to the following
for speed bin 0 parts:

    Power cluster = 2188.8 MHz

Also add the characterized Turbo Fmax frequency (2342.4 MHz) and
the new intermediate Turbo frequency (2246.4 MHz) for the
performance cluster on speed bin 0 parts.

Change-Id: If4c1f8b4e06bbd41b8152cdab5b6945b4dfc64bc
CRs-Fixed: 981475
Signed-off-by: default avatarDavid Collins <collinsd@codeaurora.org>
parent e3ea6c56
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+22 −25
Original line number Diff line number Diff line
@@ -37,19 +37,15 @@

&apc0_pwrcl_vreg {
	regulator-min-microvolt = <1>;
	/*
	 * Note that corner 19 cannot be set by software.  It is used only as a
	 * reference for interpolation.
	 */
	regulator-max-microvolt = <18>;
	regulator-max-microvolt = <20>;

	qcom,cpr-fuse-corners = <5>;
	qcom,cpr-fuse-combos = <16>;
	qcom,cpr-speed-bins = <2>;
	qcom,cpr-speed-bin-corners = <19 19>;
	qcom,cpr-speed-bin-corners = <20 19>;
	qcom,cpr-corners =
		/* Speed bin 0 */
		<19 19 19 19 19 19 19 19>,
		<20 20 20 20 20 20 20 20>,

		/* Speed bin 1 */
		<19 19 19 19 19 19 19 19>;
@@ -65,7 +61,7 @@
		/* Speed bin 0 */
		<670000  670000  670000  670000  670000  670000  745000  745000
		 745000  905000  905000  905000  905000  905000 1140000 1140000
		1140000 1140000 1140000>,
		1140000 1140000 1140000 1140000>,

		/* Speed bin 1 */
		<670000  670000  670000  670000  670000  670000  745000  745000
@@ -76,7 +72,7 @@
		/* Speed bin 0 */
		<470000  470000  470000  470000  470000  470000  470000  470000
		 470000  470000  470000  470000  470000  470000  470000  470000
		 470000  470000  470000>,
		 470000  470000  470000  470000>,

		/* Speed bin 1 */
		<470000  470000  470000  470000  470000  470000  470000  470000
@@ -87,7 +83,7 @@
		/* Speed bin 0 */
		<80000   80000   80000   80000   80000   80000   80000   80000
		 80000   80000   80000   80000   80000   80000   80000   80000
		 80000   80000   80000>,
		 80000   80000   80000   80000>,

		/* Speed bin 1 */
		<80000   80000   80000   80000   80000   80000   80000   80000
@@ -99,7 +95,7 @@
		<307200000  384000000  460800000  537600000  614400000
		 691200000  768000000  844800000  902400000  979200000
		1056000000 1132800000 1209600000 1286400000 1363200000
		1440000000 1516800000 1593600000 1785600000>,
		1440000000 1516800000 1593600000 1785600000 2188800000>,

		/* Speed bin 1 */
		<307200000  384000000  460800000  537600000  614400000
@@ -160,7 +156,7 @@
		/* Speed bin 0 */
		<(-15000) (-15000) (-15000) (-15000) (-15000) (-15000) (-15000)
		 (-15000) (-15000) (-17000) (-19000) (-21000) (-23000) (-25000)
		 (-26000) (-27000) (-27000) (-28000) (-30000)>,
		 (-26000) (-27000) (-27000) (-28000) (-30000)  130000>,

		/* Speed bin 1 */
		<(-15000) (-15000) (-15000) (-15000) (-15000) (-15000) (-15000)
@@ -169,7 +165,7 @@

	qcom,cpr-open-loop-voltage-min-diff =
		/* Speed bin 0 */
	       <0 0 0 0 (-50000) 0 0 0 0 0 0 0 0 0 0 0 0 0 0>,
	       <0 0 0 0 (-50000) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>,

		/* Speed bin 1 */
	       <0 0 0 0 (-50000) 0 0 0 0 0 0 0 0 0 0 0 0 0 0>;
@@ -178,7 +174,7 @@
		/* Speed bin 0 */
		<(-15000) (-15000) (-15000) (-15000) (-15000) (-15000) (-15000)
		 (-15000) (-15000) (-17000) (-19000) (-21000) (-23000) (-25000)
		 (-26000) (-27000) (-27000) (-28000) (-30000)>,
		 (-26000) (-27000) (-27000) (-28000) (-30000)  130000>,

		/* Speed bin 1 */
		<(-15000) (-15000) (-15000) (-15000) (-15000) (-15000) (-15000)
@@ -321,22 +317,22 @@

&apc1_vreg {
	regulator-min-microvolt = <1>;
	regulator-max-microvolt = <25>;
	regulator-max-microvolt = <27>;

	qcom,cpr-fuse-corners = <5>;
	qcom,cpr-fuse-combos = <16>;
	qcom,cpr-speed-bins = <2>;
	qcom,cpr-speed-bin-corners = <25 25>;
	qcom,cpr-speed-bin-corners = <27 25>;
	qcom,cpr-corners =
		/* Speed bin 0 */
		<25 25 25 25 25 25 25 25>,
		<27 27 27 27 27 27 27 27>,

		/* Speed bin 1 */
		<25 25 25 25 25 25 25 25>;

	qcom,cpr-corner-fmax-map =
		/* Speed bin 0 */
		<1 7 10 15 25>,
		<1 7 10 15 27>,

		/* Speed bin 1 */
		<1 7 10 15 25>;
@@ -346,7 +342,7 @@
		<670000  670000  670000  670000  670000  670000  670000  745000
		 745000  745000  905000  905000  905000  905000  905000 1140000
		1140000 1140000 1140000 1140000 1140000 1140000 1140000 1140000
		1140000>,
		1140000 1140000 1140000>,

		/* Speed bin 1 */
		<670000  670000  670000  670000  670000  670000  670000  745000
@@ -359,7 +355,7 @@
		<470000  470000  470000  470000  470000  470000  470000  470000
		 470000  470000  470000  470000  470000  470000  470000  470000
		 470000  470000  470000  470000  470000  470000  470000  470000
		 470000>,
		 470000  470000  470000>,

		/* Speed bin 1 */
		<470000  470000  470000  470000  470000  470000  470000  470000
@@ -372,7 +368,7 @@
		 <80000   80000   80000   80000   80000   80000   80000   80000
		  80000   80000   80000   80000   80000   80000   80000   80000
		  80000   80000   80000   80000   80000   80000   80000   80000
		  80000>,
		  80000   80000   80000>,

		 /* Speed bin 1 */
		 <80000   80000   80000   80000   80000   80000   80000   80000
@@ -386,7 +382,8 @@
		 691200000  748800000  825600000  902400000  979200000
		1056000000 1132800000 1209600000 1286400000 1363200000
		1440000000 1516800000 1593600000 1670400000 1747200000
		1824000000 1900800000 1977600000 2054400000 2150400000>,
		1824000000 1900800000 1977600000 2054400000 2150400000
		2246400000 2342400000>,

		/* Speed bin 1 */
		<307200000  384000000  460800000  537600000  614400000
@@ -449,7 +446,7 @@
		<(-15000) (-15000) (-15000) (-15000) (-15000) (-15000) (-15000)
		 (-15000) (-15000) (-15000) (-17000) (-19000) (-21000) (-23000)
		 (-25000) (-25000) (-26000) (-26000) (-27000) (-27000) (-28000)
		 (-28000) (-29000) (-29000) (-30000)>,
		 (-28000) (-29000) (-29000) (-30000) (-30000) (-30000)>,

		/* Speed bin 1 */
		<(-15000) (-15000) (-15000) (-15000) (-15000) (-15000) (-15000)
@@ -459,7 +456,7 @@

	qcom,cpr-open-loop-voltage-min-diff =
		/* Speed bin 0 */
		<0 0 0 0 (-50000) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>,
		<0 0 0 0 (-50000) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>,

		/* Speed bin 1 */
		<0 0 0 0 (-50000) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>;
@@ -469,7 +466,7 @@
		<(-15000) (-15000) (-15000) (-15000) (-15000) (-15000) (-15000)
		 (-15000) (-15000) (-15000) (-17000) (-19000) (-21000) (-23000)
		 (-25000) (-25000) (-26000) (-26000) (-27000) (-27000) (-28000)
		 (-28000) (-29000) (-29000) (-30000)>,
		 (-28000) (-29000) (-29000) (-30000) (-30000) (-30000)>,

		/* Speed bin 1 */
		<(-15000) (-15000) (-15000) (-15000) (-15000) (-15000) (-15000)