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Commit f6737055 authored by Roland Stigge's avatar Roland Stigge
Browse files

ARM: LPC32xx: Fix irq on GPI_28 



The GPI_28 IRQ was not registered properly. The registration of
IRQ_LPC32XX_GPI_28 was added and the (wrong) IRQ_LPC32XX_GPI_11 at
LPC32XX_SIC1_IRQ(4) was replaced by IRQ_LPC32XX_GPI_28 (see manual of
LPC32xx / interrupt controller).

Signed-off-by: default avatarRoland Stigge <stigge@antcom.de>
Cc: stable@vger.kernel.org
parent 6b21d18e

arch/arm/mach-lpc32xx/include/mach/irqs.h

+1 −1
Original line number Diff line number Diff line
@@ -61,7 +61,7 @@ 
 */

#define IRQ_LPC32XX_JTAG_COMM_TX	LPC32XX_SIC1_IRQ(1)

#define IRQ_LPC32XX_JTAG_COMM_RX	LPC32XX_SIC1_IRQ(2)

#define IRQ_LPC32XX_GPI_11		LPC32XX_SIC1_IRQ(4)

#define IRQ_LPC32XX_GPI_28		LPC32XX_SIC1_IRQ(4)

#define IRQ_LPC32XX_TS_P		LPC32XX_SIC1_IRQ(6)

#define IRQ_LPC32XX_TS_IRQ		LPC32XX_SIC1_IRQ(7)

#define IRQ_LPC32XX_TS_AUX		LPC32XX_SIC1_IRQ(8)

arch/arm/mach-lpc32xx/irq.c

+4 −0
Original line number Diff line number Diff line
@@ -118,6 +118,10 @@ static const struct lpc32xx_event_info lpc32xx_events[NR_IRQS] = { 
		.event_group = &lpc32xx_event_pin_regs,

		.mask = LPC32XX_CLKPWR_EXTSRC_GPI_06_BIT,

	},

	[IRQ_LPC32XX_GPI_28] = {

		.event_group = &lpc32xx_event_pin_regs,

		.mask = LPC32XX_CLKPWR_EXTSRC_GPI_28_BIT,

	},

	[IRQ_LPC32XX_GPIO_00] = {

		.event_group = &lpc32xx_event_int_regs,

		.mask = LPC32XX_CLKPWR_INTSRC_GPIO_00_BIT,