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Commit f5ce5e7e authored by Stephen Warren's avatar Stephen Warren Committed by Olof Johansson
Browse files

arm/tegra: Remove code that's ifndef CONFIG_ARM_GIC 



entry-macro.S contains some stale code for chips before Tegra20 that
apparently didn't use an ARM GIC. All chips supported by mainline use
an ARM GIC, so rip out the stale code.

Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parent 103c43a2

arch/arm/mach-tegra/include/mach/entry-macro.S

+0 −23
Original line number Diff line number Diff line
@@ -15,7 +15,6 @@ 
#include <mach/iomap.h>

#include <mach/io.h>



#if defined(CONFIG_ARM_GIC)

#define HAVE_GET_IRQNR_PREAMBLE

#include <asm/hardware/entry-macro-gic.S>
@@ -32,25 +31,3 @@ 


	.macro  arch_ret_to_user, tmp1, tmp2

	.endm
 
#else

	/* legacy interrupt controller for AP16 */

	.macro	disable_fiq

	.endm



	.macro	get_irqnr_preamble, base, tmp

	@ enable imprecise aborts

	cpsie	a

	@ EVP base at 0xf010f000

	mov \base, #0xf0000000

	orr \base, #0x00100000

	orr \base, #0x0000f000

	.endm



	.macro	arch_ret_to_user, tmp1, tmp2

	.endm



	.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp

	ldr \irqnr, [\base, #0x20]	@ EVT_IRQ_STS

	cmp \irqnr, #0x80

	.endm

#endif