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Commit f5c122da authored by Kevin Hilman's avatar Kevin Hilman
Browse files

davinci: add arch_ioremap() which uses existing static mappings



Add arch-specific ioremap() which uses any existing static mappings in
place of doing a new mapping.  From now on, drivers should always use
ioremap() instead of IO_ADDRESS().

In addition, remove the davinci_[read|write]* macros in favor of using
ioremap.

Signed-off-by: default avatarKevin Hilman <khilman@deeprootsystems.com>
parent c5b736d0
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+3 −1
Original line number Diff line number Diff line
@@ -36,6 +36,9 @@
#include <mach/common.h>
#include <mach/i2c.h>

#define DAVINCI_CFC_ATA_BASE		  0x01C66000
#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE  0x02000000

/* other misc. init functions */
void __init davinci_psc_init(void);
void __init davinci_irq_init(void);
@@ -422,7 +425,6 @@ static __init void davinci_evm_init(void)

static __init void davinci_evm_irq_init(void)
{
	davinci_init_common_hw();
	davinci_irq_init();
}

+2 −0
Original line number Diff line number Diff line
@@ -22,6 +22,8 @@
#include <mach/i2c.h>
#include <mach/irqs.h>

#define DAVINCI_I2C_BASE	     0x01C21000

static struct resource i2c_resources[] = {
	{
		.start		= DAVINCI_I2C_BASE,
+3 −3
Original line number Diff line number Diff line
@@ -15,7 +15,7 @@
#include <linux/init.h>
#include <linux/io.h>

#define JTAG_ID_BASE		0x01c40028
#define JTAG_ID_BASE		IO_ADDRESS(0x01c40028)

static unsigned int davinci_revision;

@@ -58,7 +58,7 @@ static u16 __init davinci_get_part_no(void)
{
	u32 dev_id, part_no;

	dev_id = davinci_readl(JTAG_ID_BASE);
	dev_id = __raw_readl(JTAG_ID_BASE);

	part_no = ((dev_id >> 12) & 0xffff);

@@ -72,7 +72,7 @@ static u8 __init davinci_get_variant(void)
{
	u32 variant;

	variant = davinci_readl(JTAG_ID_BASE);
	variant = __raw_readl(JTAG_ID_BASE);

	variant = (variant >> 28) & 0xf;

+3 −1
Original line number Diff line number Diff line
@@ -15,9 +15,11 @@

#include <linux/io.h>
#include <asm-generic/gpio.h>
#include <mach/hardware.h>

#include <mach/irqs.h>

#define DAVINCI_GPIO_BASE 0x01C67000

/*
 * basic gpio routines
 *
+13 −38
Original line number Diff line number Diff line
/*
 * Common hardware definitions
 * Hardware definitions common to all DaVinci family processors
 *
 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
 * Author: Kevin Hilman, Deep Root Systems, LLC
 *
 * 2007 (c) MontaVista Software, Inc. This file is licensed under
 * 2007 (c) Deep Root Systems, LLC. This file is licensed under
 * the terms of the GNU General Public License version 2. This program
 * is licensed "as is" without any warranty of any kind, whether express
 * or implied.
@@ -12,41 +12,16 @@
#define __ASM_ARCH_HARDWARE_H

/*
 * Base register addresses
 * Before you add anything to ths file:
 *
 * This header is for defines common to ALL DaVinci family chips.
 * Anything that is chip specific should go in <chipname>.h,
 * and the chip/board init code should then explicitly include
 * <chipname>.h
 */
#define DAVINCI_DMA_3PCC_BASE			(0x01C00000)
#define DAVINCI_DMA_3PTC0_BASE			(0x01C10000)
#define DAVINCI_DMA_3PTC1_BASE			(0x01C10400)
#define DAVINCI_I2C_BASE			(0x01C21000)
#define DAVINCI_PWM0_BASE			(0x01C22000)
#define DAVINCI_PWM1_BASE			(0x01C22400)
#define DAVINCI_PWM2_BASE			(0x01C22800)
#define DAVINCI_SYSTEM_MODULE_BASE		(0x01C40000)
#define DAVINCI_PLL_CNTRL0_BASE			(0x01C40800)
#define DAVINCI_PLL_CNTRL1_BASE			(0x01C40C00)
#define DAVINCI_PWR_SLEEP_CNTRL_BASE		(0x01C41000)
#define DAVINCI_SYSTEM_DFT_BASE			(0x01C42000)
#define DAVINCI_IEEE1394_BASE			(0x01C60000)
#define DAVINCI_USB_OTG_BASE			(0x01C64000)
#define DAVINCI_CFC_ATA_BASE			(0x01C66000)
#define DAVINCI_SPI_BASE			(0x01C66800)
#define DAVINCI_GPIO_BASE			(0x01C67000)
#define DAVINCI_UHPI_BASE			(0x01C67800)
#define DAVINCI_VPSS_REGS_BASE			(0x01C70000)
#define DAVINCI_EMAC_CNTRL_REGS_BASE		(0x01C80000)
#define DAVINCI_EMAC_WRAPPER_CNTRL_REGS_BASE	(0x01C81000)
#define DAVINCI_EMAC_WRAPPER_RAM_BASE		(0x01C82000)
#define DAVINCI_MDIO_CNTRL_REGS_BASE		(0x01C84000)
#define DAVINCI_IMCOP_BASE			(0x01CC0000)
#define DAVINCI_ASYNC_EMIF_CNTRL_BASE		(0x01E00000)
#define DAVINCI_VLYNQ_BASE			(0x01E01000)
#define DAVINCI_MCBSP_BASE			(0x01E02000)
#define DAVINCI_MMC_SD_BASE			(0x01E10000)
#define DAVINCI_MS_BASE				(0x01E20000)
#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE	(0x02000000)
#define DAVINCI_ASYNC_EMIF_DATA_CE1_BASE	(0x04000000)
#define DAVINCI_ASYNC_EMIF_DATA_CE2_BASE	(0x06000000)
#define DAVINCI_ASYNC_EMIF_DATA_CE3_BASE	(0x08000000)
#define DAVINCI_VLYNQ_REMOTE_BASE		(0x0C000000)
#define DAVINCI_SYSTEM_MODULE_BASE        0x01C40000

/* System control register offsets */
#define DM64XX_VDD3P3V_PWDN	0x48

#endif /* __ASM_ARCH_HARDWARE_H */
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