Merge branch 'spear/dwdma' into late/cleanup

- clocks : From common clock binding. First clock is phandle to clock for apb

	pclk. Additional clocks are optional and specific to those peripherals.

- clock-names : From common clock binding. Shall be "apb_pclk" for first clock.

- dmas : From common DMA binding. If present, refers to one or more dma channels.

- dma-names : From common DMA binding, needs to match the 'dmas' property.

              Devices with exactly one receive and transmit channel shall name

              these "rx" and "tx", respectively.

- pinctrl-<n> : Pinctrl states as described in bindings/pinctrl/pinctrl-bindings.txt

- pinctrl-names : Names corresponding to the numbered pinctrl states

- interrupts : one or more interrupt specifiers

- interrupt-names : names corresponding to the interrupts properties

Example:

serial@fff36000 {

	compatible = "arm,pl011", "arm,primecell";

	arm,primecell-periphid = <0x00341011>;

	clocks = <&pclk>;

	clock-names = "apb_pclk";

	dmas = <&dma-controller 4>, <&dma-controller 5>;

	dma-names = "rx", "tx";	

	pinctrl-0 = <&uart0_default_mux>, <&uart0_default_mode>;

	pinctrl-1 = <&uart0_sleep_mode>;

	pinctrl-names = "default","sleep";

	interrupts = <0 11 0x4>;

};

- interrupt-parent: Should be the phandle for the interrupt controller

  that services interrupts for this device

- interrupt: Should contain the CF interrupt number

- clock-frequency: Interface clock rate, in Hz, one of

       25000000

       33000000

       40000000

       50000000

       66000000

       75000000

      100000000

      125000000

      150000000

      166000000

      200000000

Optional properties:

- arasan,broken-udma: if present, UDMA mode is unusable

- arasan,broken-mwdma: if present, MWDMA mode is unusable

- arasan,broken-pio: if present, PIO mode is unusable

- dmas: one DMA channel, as described in bindings/dma/dma.txt

  required unless both UDMA and MWDMA mode are broken

- dma-names: the corresponding channel name, must be "data"

Example:

		reg = <0xfc000000 0x1000>;

		interrupt-parent = <&vic1>;

		interrupts = <12>;

		dmas = <&dma-controller 23>;

		dma-names = "data";

	};

* ARM AMBA Primecell PL011 serial UART

Required properties:

- compatible: must be "arm,primecell", "arm,pl011"

- reg: exactly one register range with length 0x1000

- interrupts: exactly one interrupt specifier

Optional properties:

- pinctrl: When present, must have one state named "sleep"

	   and one state named "default"

- clocks:  When present, must refer to exactly one clock named

	   "apb_pclk"

- dmas:	   When present, may have one or two dma channels.

	   The first one must be named "rx", the second one

	   must be named "tx".

See also bindings/arm/primecell.txt

                            device will be suspended immediately

- pl022,rt : indicates the controller should run the message pump with realtime

             priority to minimise the transfer latency on the bus (boolean)

- dmas : Two or more DMA channel specifiers following the convention outlined

         in bindings/dma/dma.txt

- dma-names: Names for the dma channels, if present. There must be at

	     least one channel named "tx" for transmit and named "rx" for

             receive.

SPI slave nodes must be children of the SPI master node and can

- pl022,wait-state : Microwire interface: Wait state

- pl022,duplex : Microwire interface: Full/Half duplex

Example:

	spi@e0100000 {

		compatible = "arm,pl022", "arm,primecell";

		reg = <0xe0100000 0x1000>;

		#address-cells = <1>;

		#size-cells = <0>;

		interrupts = <0 31 0x4>;

		dmas = <&dma-controller 23 1>,

			<&dma-controller 24 0>;

		dma-names = "rx", "tx";

		m25p80@1 {

			compatible = "st,m25p80";

			reg = <1>;

			spi-max-frequency = <12000000>;

			spi-cpol;

			spi-cpha;

			pl022,hierarchy = <0>;

			pl022,interface = <0>;

			pl022,slave-tx-disable;

			pl022,com-mode = <0x2>;

			pl022,rx-level-trig = <0>;

			pl022,tx-level-trig = <0>;

			pl022,ctrl-len = <0x11>;

			pl022,wait-state = <0>;

			pl022,duplex = <0>;

		};

	};

				reg = <0xb4100000 0x1000>;

				interrupts = <0 105 0x4>;

				status = "disabled";

				dmas = <&dwdma0 0x600 0 0 1>, /* 0xC << 11 */

					<&dwdma0 0x680 0 1 0>; /* 0xD << 7 */

				dma-names = "tx", "rx";

			};

			thermal@e07008c4 {