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Commit f4c6b6bc authored by Ralf Baechle's avatar Ralf Baechle
Browse files

MIPS: Consolidate all CONFIG_CPU_HAS_LLSC use in a single C file. 



Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 6eb10bc9

arch/mips/include/asm/system.h

+12 −0
Original line number Diff line number Diff line
@@ -63,11 +63,23 @@ do { \ 
#define __mips_mt_fpaff_switch_to(prev) do { (void) (prev); } while (0)

#endif



#ifdef CONFIG_CPU_HAS_LLSC

#define __clear_software_ll_bit() do { } while (0)

#else

extern unsigned long ll_bit;



#define __clear_software_ll_bit()					\

do {									\

	ll_bit = 0;							\

} while (0)

#endif



#define switch_to(prev, next, last)					\

do {									\

	__mips_mt_fpaff_switch_to(prev);				\

	if (cpu_has_dsp)						\

		__save_dsp(prev);					\

	__clear_software_ll_bit();					\

	(last) = resume(prev, next, task_thread_info(next));		\

} while (0)

arch/mips/kernel/octeon_switch.S

+0 −3
Original line number Diff line number Diff line
@@ -36,9 +36,6 @@ 
	.align	7

	LEAF(resume)

	.set arch=octeon

#ifndef CONFIG_CPU_HAS_LLSC

	sw	zero, ll_bit

#endif

	mfc0	t1, CP0_STATUS

	LONG_S	t1, THREAD_STATUS(a0)

	cpu_save_nonscratch a0

arch/mips/kernel/r2300_switch.S

+0 −3
Original line number Diff line number Diff line
@@ -46,9 +46,6 @@ 
 *                     struct thread_info *next_ti) )

 */

LEAF(resume)

#ifndef CONFIG_CPU_HAS_LLSC

	sw      zero, ll_bit

#endif

	mfc0	t1, CP0_STATUS

	sw	t1, THREAD_STATUS(a0)

	cpu_save_nonscratch a0

arch/mips/kernel/r4k_switch.S

+0 −3
Original line number Diff line number Diff line
@@ -45,9 +45,6 @@ 
 */

	.align	5

	LEAF(resume)

#ifndef CONFIG_CPU_HAS_LLSC

	sw	zero, ll_bit

#endif

	mfc0	t1, CP0_STATUS

	LONG_S	t1, THREAD_STATUS(a0)

	cpu_save_nonscratch a0