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Commit f47299c5 authored by Alex Deucher's avatar Alex Deucher Committed by Dave Airlie
Browse files

drm/radeon/kms: display watermark fixes 



- rs780/880 were using the wrong bandwidth functions
- convert r1xx-r4xx to use the same pm sclk/mclk structs as
r5xx+
- move bandwidth setup to a common function

Signed-off-by: default avatarAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent 9e7b414e

drivers/gpu/drm/radeon/evergreen.c

+2 −7
Original line number Diff line number Diff line
@@ -437,7 +437,6 @@ static void evergreen_gpu_init(struct radeon_device *rdev) 


int evergreen_mc_init(struct radeon_device *rdev)

{

	fixed20_12 a;

	u32 tmp;

	int chansize, numchan;
@@ -482,12 +481,8 @@ int evergreen_mc_init(struct radeon_device *rdev) 
		rdev->mc.real_vram_size = rdev->mc.aper_size;

	}

	r600_vram_gtt_location(rdev, &rdev->mc);

	/* FIXME: we should enforce default clock in case GPU is not in

	 * default setup

	 */

	a.full = rfixed_const(100);

	rdev->pm.sclk.full = rfixed_const(rdev->clock.default_sclk);

	rdev->pm.sclk.full = rfixed_div(rdev->pm.sclk, a);

	radeon_update_bandwidth_info(rdev);



	return 0;

}

drivers/gpu/drm/radeon/r100.c

+3 −5
Original line number Diff line number Diff line
@@ -2025,6 +2025,7 @@ void r100_mc_init(struct radeon_device *rdev) 
	radeon_vram_location(rdev, &rdev->mc, base);

	if (!(rdev->flags & RADEON_IS_AGP))

		radeon_gtt_location(rdev, &rdev->mc);

	radeon_update_bandwidth_info(rdev);

}
@@ -2416,11 +2417,8 @@ void r100_bandwidth_update(struct radeon_device *rdev) 
	/*

	 * determine is there is enough bw for current mode

	 */

	mclk_ff.full = rfixed_const(rdev->clock.default_mclk);

	temp_ff.full = rfixed_const(100);

	mclk_ff.full = rfixed_div(mclk_ff, temp_ff);

	sclk_ff.full = rfixed_const(rdev->clock.default_sclk);

	sclk_ff.full = rfixed_div(sclk_ff, temp_ff);

	sclk_ff = rdev->pm.sclk;

	mclk_ff = rdev->pm.mclk;



	temp = (rdev->mc.vram_width / 8) * (rdev->mc.vram_is_ddr ? 2 : 1);

	temp_ff.full = rfixed_const(temp);

drivers/gpu/drm/radeon/r300.c

+1 −0
Original line number Diff line number Diff line
@@ -482,6 +482,7 @@ void r300_mc_init(struct radeon_device *rdev) 
	radeon_vram_location(rdev, &rdev->mc, base);

	if (!(rdev->flags & RADEON_IS_AGP))

		radeon_gtt_location(rdev, &rdev->mc);

	radeon_update_bandwidth_info(rdev);

}



void rv370_set_pcie_lanes(struct radeon_device *rdev, int lanes)

drivers/gpu/drm/radeon/r520.c

+1 −7
Original line number Diff line number Diff line
@@ -122,19 +122,13 @@ static void r520_vram_get_type(struct radeon_device *rdev) 


void r520_mc_init(struct radeon_device *rdev)

{

	fixed20_12 a;



	r520_vram_get_type(rdev);

	r100_vram_init_sizes(rdev);

	radeon_vram_location(rdev, &rdev->mc, 0);

	if (!(rdev->flags & RADEON_IS_AGP))

		radeon_gtt_location(rdev, &rdev->mc);

	/* FIXME: we should enforce default clock in case GPU is not in

	 * default setup

	 */

	a.full = rfixed_const(100);

	rdev->pm.sclk.full = rfixed_const(rdev->clock.default_sclk);

	rdev->pm.sclk.full = rfixed_div(rdev->pm.sclk, a);

	radeon_update_bandwidth_info(rdev);

}



void r520_mc_program(struct radeon_device *rdev)

drivers/gpu/drm/radeon/r600.c

+2 −7
Original line number Diff line number Diff line
@@ -676,7 +676,6 @@ void r600_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc) 


int r600_mc_init(struct radeon_device *rdev)

{

	fixed20_12 a;

	u32 tmp;

	int chansize, numchan;
@@ -720,14 +719,10 @@ int r600_mc_init(struct radeon_device *rdev) 
		rdev->mc.real_vram_size = rdev->mc.aper_size;

	}

	r600_vram_gtt_location(rdev, &rdev->mc);

	/* FIXME: we should enforce default clock in case GPU is not in

	 * default setup

	 */

	a.full = rfixed_const(100);

	rdev->pm.sclk.full = rfixed_const(rdev->clock.default_sclk);

	rdev->pm.sclk.full = rfixed_div(rdev->pm.sclk, a);



	if (rdev->flags & RADEON_IS_IGP)

		rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);

	radeon_update_bandwidth_info(rdev);

	return 0;

}