Loading drivers/gpu/msm/adreno.c +16 −0 Original line number Diff line number Diff line Loading @@ -1397,6 +1397,19 @@ static int _adreno_start(struct adreno_device *adreno_dev) adreno_dev->busy_data.vbif_ram_cycles = 0; adreno_dev->busy_data.vbif_starved_ram = 0; if (ADRENO_FEATURE(adreno_dev, ADRENO_LM) && adreno_dev->lm_threshold_count == 0) { int ret; ret = adreno_perfcounter_get(adreno_dev, KGSL_PERFCOUNTER_GROUP_GPMU_PWR, 27, &adreno_dev->lm_threshold_count, NULL, PERFCOUNTER_FLAG_KERNEL); /* Ignore noncritical ret - used for debugfs */ if (ret) adreno_dev->lm_threshold_count = 0; } /* Restore performance counter registers with saved values */ adreno_perfcounter_restore(adreno_dev); Loading Loading @@ -2500,6 +2513,9 @@ static void adreno_power_stats(struct kgsl_device *device, stats->ram_time = ram_cycles; stats->ram_wait = starved_ram; } if (adreno_dev->lm_threshold_count) kgsl_regread(&adreno_dev->dev, adreno_dev->lm_threshold_count, &adreno_dev->lm_threshold_cross); } static unsigned int adreno_gpuid(struct kgsl_device *device, Loading drivers/gpu/msm/adreno.h +4 −0 Original line number Diff line number Diff line Loading @@ -291,6 +291,8 @@ struct adreno_gpu_core { * @lm_sequence: Pointer to the start of the register write sequence for LM * @lm_size: The dword size of the LM sequence * @lm_limit: limiting value for LM * @lm_threshold_count: register value for counter for lm threshold breakin * @lm_threshold_cross: number of current peaks exceeding threshold */ struct adreno_device { struct kgsl_device dev; /* Must be first field in this struct */ Loading Loading @@ -343,6 +345,8 @@ struct adreno_device { struct work_struct gpmu_work; uint32_t lm_leakage; uint32_t lm_limit; uint32_t lm_threshold_count; uint32_t lm_threshold_cross; struct kgsl_memdesc capturescript; struct kgsl_memdesc snapshot_registers; Loading drivers/gpu/msm/adreno_debugfs.c +19 −1 Original line number Diff line number Diff line Loading @@ -97,6 +97,21 @@ static int _lm_limit_get(void *data, u64 *val) DEFINE_SIMPLE_ATTRIBUTE(_lm_limit_fops, _lm_limit_get, _lm_limit_set, "%llu\n"); static int _lm_threshold_count_get(void *data, u64 *val) { struct kgsl_device *device = data; struct adreno_device *adreno_dev = ADRENO_DEVICE(device); if (!ADRENO_FEATURE(adreno_dev, ADRENO_LM)) *val = 0; else *val = (u64) adreno_dev->lm_threshold_cross; return 0; } DEFINE_SIMPLE_ATTRIBUTE(_lm_threshold_fops, _lm_threshold_count_get, NULL, "%llu\n"); static int _active_count_get(void *data, u64 *val) { struct kgsl_device *device = data; Loading Loading @@ -348,9 +363,12 @@ void adreno_debugfs_init(struct adreno_device *adreno_dev) adreno_dev->ctx_d_debugfs = debugfs_create_dir("ctx", device->d_debugfs); if (ADRENO_FEATURE(adreno_dev, ADRENO_LM)) if (ADRENO_FEATURE(adreno_dev, ADRENO_LM)) { debugfs_create_file("lm_limit", 0644, device->d_debugfs, device, &_lm_limit_fops); debugfs_create_file("lm_threshold_count", 0444, device->d_debugfs, device, &_lm_threshold_fops); } if (adreno_is_a5xx(adreno_dev)) debugfs_create_file("isdb", 0644, device->d_debugfs, Loading Loading
drivers/gpu/msm/adreno.c +16 −0 Original line number Diff line number Diff line Loading @@ -1397,6 +1397,19 @@ static int _adreno_start(struct adreno_device *adreno_dev) adreno_dev->busy_data.vbif_ram_cycles = 0; adreno_dev->busy_data.vbif_starved_ram = 0; if (ADRENO_FEATURE(adreno_dev, ADRENO_LM) && adreno_dev->lm_threshold_count == 0) { int ret; ret = adreno_perfcounter_get(adreno_dev, KGSL_PERFCOUNTER_GROUP_GPMU_PWR, 27, &adreno_dev->lm_threshold_count, NULL, PERFCOUNTER_FLAG_KERNEL); /* Ignore noncritical ret - used for debugfs */ if (ret) adreno_dev->lm_threshold_count = 0; } /* Restore performance counter registers with saved values */ adreno_perfcounter_restore(adreno_dev); Loading Loading @@ -2500,6 +2513,9 @@ static void adreno_power_stats(struct kgsl_device *device, stats->ram_time = ram_cycles; stats->ram_wait = starved_ram; } if (adreno_dev->lm_threshold_count) kgsl_regread(&adreno_dev->dev, adreno_dev->lm_threshold_count, &adreno_dev->lm_threshold_cross); } static unsigned int adreno_gpuid(struct kgsl_device *device, Loading
drivers/gpu/msm/adreno.h +4 −0 Original line number Diff line number Diff line Loading @@ -291,6 +291,8 @@ struct adreno_gpu_core { * @lm_sequence: Pointer to the start of the register write sequence for LM * @lm_size: The dword size of the LM sequence * @lm_limit: limiting value for LM * @lm_threshold_count: register value for counter for lm threshold breakin * @lm_threshold_cross: number of current peaks exceeding threshold */ struct adreno_device { struct kgsl_device dev; /* Must be first field in this struct */ Loading Loading @@ -343,6 +345,8 @@ struct adreno_device { struct work_struct gpmu_work; uint32_t lm_leakage; uint32_t lm_limit; uint32_t lm_threshold_count; uint32_t lm_threshold_cross; struct kgsl_memdesc capturescript; struct kgsl_memdesc snapshot_registers; Loading
drivers/gpu/msm/adreno_debugfs.c +19 −1 Original line number Diff line number Diff line Loading @@ -97,6 +97,21 @@ static int _lm_limit_get(void *data, u64 *val) DEFINE_SIMPLE_ATTRIBUTE(_lm_limit_fops, _lm_limit_get, _lm_limit_set, "%llu\n"); static int _lm_threshold_count_get(void *data, u64 *val) { struct kgsl_device *device = data; struct adreno_device *adreno_dev = ADRENO_DEVICE(device); if (!ADRENO_FEATURE(adreno_dev, ADRENO_LM)) *val = 0; else *val = (u64) adreno_dev->lm_threshold_cross; return 0; } DEFINE_SIMPLE_ATTRIBUTE(_lm_threshold_fops, _lm_threshold_count_get, NULL, "%llu\n"); static int _active_count_get(void *data, u64 *val) { struct kgsl_device *device = data; Loading Loading @@ -348,9 +363,12 @@ void adreno_debugfs_init(struct adreno_device *adreno_dev) adreno_dev->ctx_d_debugfs = debugfs_create_dir("ctx", device->d_debugfs); if (ADRENO_FEATURE(adreno_dev, ADRENO_LM)) if (ADRENO_FEATURE(adreno_dev, ADRENO_LM)) { debugfs_create_file("lm_limit", 0644, device->d_debugfs, device, &_lm_limit_fops); debugfs_create_file("lm_threshold_count", 0444, device->d_debugfs, device, &_lm_threshold_fops); } if (adreno_is_a5xx(adreno_dev)) debugfs_create_file("isdb", 0644, device->d_debugfs, Loading