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Commit f3d73f36 authored by Sukumar Ghorai's avatar Sukumar Ghorai Committed by Tony Lindgren
Browse files

omap3: nand: ecc layout select from board file 



This patch makes it possible to select sw or hw (different layout options)
ecc scheme supported by omap nand driver.

Signed-off-by: default avatarVimal Singh <vimalsingh@ti.com>
Signed-off-by: default avatarSukumar Ghorai <s-ghorai@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 317379a9

arch/arm/mach-omap2/board-flash.c

+1 −0
Original line number Diff line number Diff line
@@ -148,6 +148,7 @@ __init board_nand_init(struct mtd_partition *nand_parts, 
	board_nand_data.nr_parts	= nr_parts;

	board_nand_data.devsize		= nand_type;



	board_nand_data.ecc_opt = OMAP_ECC_HAMMING_CODE_DEFAULT;

	board_nand_data.gpmc_irq = OMAP_GPMC_IRQ_BASE + cs;

	gpmc_nand_init(&board_nand_data);

}

arch/arm/plat-omap/include/plat/gpmc.h

+6 −0
Original line number Diff line number Diff line
@@ -86,6 +86,12 @@ 
#define PREFETCH_FIFOTHRESHOLD_MAX	0x40

#define PREFETCH_FIFOTHRESHOLD(val)	((val) << 8)



enum omap_ecc {

		/* 1-bit ecc: stored at end of spare area */

	OMAP_ECC_HAMMING_CODE_DEFAULT = 0, /* Default, s/w method */

	OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */

};



/*

 * Note that all values in this struct are in nanoseconds except sync_clk

 * (which is in picoseconds), while the register values are in gpmc_fck cycles.

arch/arm/plat-omap/include/plat/nand.h

+2 −0
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ 
 * published by the Free Software Foundation.

 */



#include <plat/gpmc.h>

#include <linux/mtd/partitions.h>



enum nand_io {
@@ -31,6 +32,7 @@ struct omap_nand_platform_data { 
	enum nand_io		xfer_type;

	unsigned long		phys_base;

	int			devsize;

	enum omap_ecc           ecc_opt;

};



/* minimum size for IO mapping */

drivers/mtd/nand/omap2.c

+11 −15
Original line number Diff line number Diff line
@@ -626,8 +626,6 @@ static int omap_verify_buf(struct mtd_info *mtd, const u_char * buf, int len) 
	return 0;

}



#ifdef CONFIG_MTD_NAND_OMAP_HWECC



/**

 * gen_true_ecc - This function will generate true ECC value

 * @ecc_buf: buffer to store ecc code
@@ -847,8 +845,6 @@ static void omap_enable_hwecc(struct mtd_info *mtd, int mode) 
	gpmc_enable_hwecc(info->gpmc_cs, mode, dev_width, info->nand.ecc.size);

}



#endif



/**

 * omap_wait - wait until the command is done

 * @mtd: MTD device structure
@@ -1038,17 +1034,17 @@ static int __devinit omap_nand_probe(struct platform_device *pdev) 


	info->nand.verify_buf = omap_verify_buf;



#ifdef CONFIG_MTD_NAND_OMAP_HWECC

	/* selsect the ecc type */

	if (pdata->ecc_opt == OMAP_ECC_HAMMING_CODE_DEFAULT)

		info->nand.ecc.mode = NAND_ECC_SOFT;

	else if (pdata->ecc_opt == OMAP_ECC_HAMMING_CODE_HW) {

		info->nand.ecc.bytes            = 3;

		info->nand.ecc.size             = 512;

		info->nand.ecc.calculate        = omap_calculate_ecc;

		info->nand.ecc.hwctl            = omap_enable_hwecc;

		info->nand.ecc.correct          = omap_correct_data;

		info->nand.ecc.mode             = NAND_ECC_HW;



#else

	info->nand.ecc.mode = NAND_ECC_SOFT;

#endif

	}



	/* DIP switches on some boards change between 8 and 16 bit

	 * bus widths for flash.  Try the other width if the first try fails.