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Commit f3014c0c authored by Michael Chan's avatar Michael Chan Committed by David S. Miller
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[BNX2]: Fix 5706 serdes link down bug.



1. Correct the MII expansion serdes control register definition.
2. Check an additional RUDI_INVALID bit when determining 5706S link.

Signed-off-by: default avatarMichael Chan <mchan@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent b6c06321
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+1 −1
Original line number Diff line number Diff line
@@ -5315,7 +5315,7 @@ bnx2_5706_serdes_has_link(struct bnx2 *bp)
	bnx2_read_phy(bp, MII_BNX2_MISC_SHADOW, &an_dbg);
	bnx2_read_phy(bp, MII_BNX2_MISC_SHADOW, &an_dbg);

	if (an_dbg & MISC_SHDW_AN_DBG_NOSYNC)
	if (an_dbg & (MISC_SHDW_AN_DBG_NOSYNC | MISC_SHDW_AN_DBG_RUDI_INVALID))
		return 0;

	bnx2_write_phy(bp, MII_BNX2_DSP_ADDRESS, MII_EXPAND_REG1);
+2 −1
Original line number Diff line number Diff line
@@ -6346,11 +6346,12 @@ struct l2_fhdr {
#define MII_BNX2_DSP_EXPAND_REG			 0x0f00
#define MII_EXPAND_REG1				  (MII_BNX2_DSP_EXPAND_REG | 1)
#define MII_EXPAND_REG1_RUDI_C			   0x20
#define MII_EXPAND_SERDES_CTL			  (MII_BNX2_DSP_EXPAND_REG | 2)
#define MII_EXPAND_SERDES_CTL			  (MII_BNX2_DSP_EXPAND_REG | 3)

#define MII_BNX2_MISC_SHADOW			0x1c
#define MISC_SHDW_AN_DBG			 0x6800
#define MISC_SHDW_AN_DBG_NOSYNC			  0x0002
#define MISC_SHDW_AN_DBG_RUDI_INVALID		  0x0100
#define MISC_SHDW_MODE_CTL			 0x7c00
#define MISC_SHDW_MODE_CTL_SIG_DET		  0x0010