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Commit f22af20c authored by Dhaval Patel's avatar Dhaval Patel Committed by Gerrit - the friendly Code Review server
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mdss: dsi: read dsi and phy revision during dsi ctrl probe 



Read dsi and phy revision only during dsi ctrl probe
and remove all other version read request code from
DSI driver.

Change-Id: I89b10f96961c75ab8340b7f1b15d6a30e26f8649
Signed-off-by: default avatarDhaval Patel <pdhaval@codeaurora.org>
parent 2ab415c7

drivers/video/msm/mdss/mdss_dsi.c

+15 −14
Original line number Diff line number Diff line
@@ -1291,8 +1291,6 @@ int mdss_dsi_on(struct mdss_panel_data *pdata) 
		 * to be restored to allow dcs command be

		 * sent to panel

		 */

		mdss_dsi_read_hw_revision(ctrl_pdata);

		mdss_dsi_read_phy_revision(ctrl_pdata);

		mdss_dsi_restore_intr_mask(ctrl_pdata);

		pr_debug("%s: panel already on\n", __func__);

		goto end;
@@ -1323,10 +1321,6 @@ int mdss_dsi_on(struct mdss_panel_data *pdata) 
	mdss_dsi_clk_ctrl(ctrl_pdata, ctrl_pdata->dsi_clk_handle,

			  MDSS_DSI_CORE_CLK, MDSS_DSI_CLK_ON);



	/* Populate DSI Controller and PHY revision */

	mdss_dsi_read_hw_revision(ctrl_pdata);

	mdss_dsi_read_phy_revision(ctrl_pdata);



	/*

	 * If ULPS during suspend feature is enabled, then DSI PHY was

	 * left on during suspend. In this case, we do not need to reset/init
@@ -1705,7 +1699,7 @@ static void __mdss_dsi_dyn_refresh_config( 
		struct mdss_dsi_ctrl_pdata *ctrl_pdata)

{

	int reg_data = 0;

	u32 phy_rev = mdss_dsi_get_phy_revision(ctrl_pdata);

	u32 phy_rev = ctrl_pdata->shared_data->phy_rev;



	/* configure only for master control in split display */

	if (mdss_dsi_is_hw_config_split(ctrl_pdata->shared_data) &&
@@ -1818,7 +1812,7 @@ static int __mdss_dsi_dfps_calc_clks(struct mdss_panel_data *pdata, 
	}



	pinfo = &pdata->panel_info;

	phy_rev = mdss_dsi_get_phy_revision(ctrl_pdata);

	phy_rev = ctrl_pdata->shared_data->phy_rev;



	rc = mdss_dsi_clk_div_config

		(&ctrl_pdata->panel_data.panel_info, new_fps);
@@ -2089,7 +2083,7 @@ static int mdss_dsi_dfps_config(struct mdss_panel_data *pdata, int new_fps) 
		return -EINVAL;

	}



	phy_rev = mdss_dsi_get_phy_revision(ctrl_pdata);

	phy_rev = ctrl_pdata->shared_data->phy_rev;

	pinfo = &pdata->panel_info;



	/* get the fps configured in HW */
@@ -2418,8 +2412,6 @@ static int mdss_dsi_event_handler(struct mdss_panel_data *pdata, 
			rc = mdss_dsi_clk_refresh(pdata,

				ctrl_pdata->update_phy_timing);



		mdss_dsi_get_hw_revision(ctrl_pdata);

		mdss_dsi_get_phy_revision(ctrl_pdata);

		rc = mdss_dsi_on(pdata);

		mdss_dsi_op_mode_config(pdata->panel_info.mipi.mode,

							pdata);
@@ -2892,12 +2884,19 @@ static int mdss_dsi_cont_splash_config(struct mdss_panel_info *pinfo, 


		mdss_dsi_clk_ctrl(ctrl_pdata, clk_handle,

				  MDSS_DSI_ALL_CLKS, MDSS_DSI_CLK_ON);

		mdss_dsi_read_hw_revision(ctrl_pdata);

		mdss_dsi_read_phy_revision(ctrl_pdata);

		ctrl_pdata->is_phyreg_enabled = 1;

		mdss_dsi_get_hw_revision(ctrl_pdata);



		if (pinfo->type == MIPI_CMD_PANEL)

			mdss_dsi_set_burst_mode(ctrl_pdata);

	} else {

		/* Turn on the clocks to read the DSI and PHY revision */

		mdss_dsi_clk_ctrl(ctrl_pdata, ctrl_pdata->dsi_clk_handle,

				  MDSS_DSI_CORE_CLK, MDSS_DSI_CLK_ON);

		mdss_dsi_read_hw_revision(ctrl_pdata);

		mdss_dsi_read_phy_revision(ctrl_pdata);

		mdss_dsi_clk_ctrl(ctrl_pdata, ctrl_pdata->dsi_clk_handle,

				  MDSS_DSI_CORE_CLK, MDSS_DSI_CLK_OFF);

		pinfo->panel_power_state = MDSS_PANEL_POWER_OFF;

	}
@@ -3083,7 +3082,9 @@ static int mdss_dsi_ctrl_probe(struct platform_device *pdev) 


	INIT_DELAYED_WORK(&ctrl_pdata->dba_work, mdss_dsi_dba_work);



	pr_debug("%s: Dsi Ctrl->%d initialized\n", __func__, index);

	pr_info("%s: Dsi Ctrl->%d initialized, DSI rev:0x%x, PHY rev:0x%x\n",

		__func__, index, ctrl_pdata->shared_data->hw_rev,

		ctrl_pdata->shared_data->phy_rev);



	if (index == 0)

		ctrl_pdata->shared_data->dsi0_active = true;

drivers/video/msm/mdss/mdss_dsi.h

+0 −1
Original line number Diff line number Diff line
@@ -630,7 +630,6 @@ bool __mdss_dsi_clk_enabled(struct mdss_dsi_ctrl_pdata *ctrl, u8 clk_type); 
void mdss_dsi_ctrl_setup(struct mdss_dsi_ctrl_pdata *ctrl);

bool mdss_dsi_dln0_phy_err(struct mdss_dsi_ctrl_pdata *ctrl, bool print_en);

void mdss_dsi_lp_cd_rx(struct mdss_dsi_ctrl_pdata *ctrl);

void mdss_dsi_get_hw_revision(struct mdss_dsi_ctrl_pdata *ctrl);

void mdss_dsi_read_phy_revision(struct mdss_dsi_ctrl_pdata *ctrl);

int mdss_dsi_panel_cmd_read(struct mdss_dsi_ctrl_pdata *ctrl, char cmd0,

		char cmd1, void (*fxn)(int), char *rbuf, int len);

drivers/video/msm/mdss/mdss_dsi_host.c

+1 −17
Original line number Diff line number Diff line
@@ -274,24 +274,12 @@ void mdss_dsi_cmd_test_pattern(struct mdss_dsi_ctrl_pdata *ctrl) 
}



void mdss_dsi_read_hw_revision(struct mdss_dsi_ctrl_pdata *ctrl)

{

	/* clock must be on */

	ctrl->shared_data->hw_rev = MIPI_INP(ctrl->ctrl_base);

}



void mdss_dsi_get_hw_revision(struct mdss_dsi_ctrl_pdata *ctrl)

{

	if (ctrl->shared_data->hw_rev)

		return;



	mdss_dsi_clk_ctrl(ctrl, ctrl->dsi_clk_handle, MDSS_DSI_CORE_CLK,

			  MDSS_DSI_CLK_ON);

	/* clock must be on */

	ctrl->shared_data->hw_rev = MIPI_INP(ctrl->ctrl_base);

	mdss_dsi_clk_ctrl(ctrl, ctrl->dsi_clk_handle, MDSS_DSI_CORE_CLK,

			  MDSS_DSI_CLK_OFF);



	pr_debug("%s: ndx=%d hw_rev=%x\n", __func__,

				ctrl->ndx, ctrl->shared_data->hw_rev);

}



void mdss_dsi_read_phy_revision(struct mdss_dsi_ctrl_pdata *ctrl)
@@ -1506,8 +1494,6 @@ static int mdss_dsi_cmd_dma_tpg_tx(struct mdss_dsi_ctrl_pdata *ctrl, 
		return -EINVAL;

	}



	mdss_dsi_get_hw_revision(ctrl);



	if (ctrl->shared_data->hw_rev < MDSS_DSI_HW_REV_103) {

		pr_err("CMD DMA TPG not supported for this DSI version\n");

		return -EINVAL;
@@ -2517,8 +2503,6 @@ int mdss_dsi_cmdlist_commit(struct mdss_dsi_ctrl_pdata *ctrl, int from_mdp) 
		mdss_dsi_cmd_mdp_busy(ctrl);

	}



	mdss_dsi_get_hw_revision(ctrl);



	/* For DSI versions less than 1.3.0, CMD DMA TPG is not supported */

	if (req && (ctrl->shared_data->hw_rev < MDSS_DSI_HW_REV_103))

		req->flags &= ~CMD_REQ_DMA_TPG;

drivers/video/msm/mdss/msm_mdss_io_8974.c

+0 −5
Original line number Diff line number Diff line
@@ -2020,11 +2020,6 @@ int mdss_dsi_post_clkon_cb(void *priv, 
	pdata = &ctrl->panel_data;



	if (clk & MDSS_DSI_CORE_CLK) {

		if (!pdata->panel_info.cont_splash_enabled) {

			mdss_dsi_read_hw_revision(ctrl);

			mdss_dsi_read_phy_revision(ctrl);

		}



		/*

		 * Phy and controller setup is needed if coming out of idle

		 * power collapse with clamps enabled.