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Commit f1b354f8 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Add debug uart support for mdmfermium"

parents 5d6b8fe3 4c92cee7
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+1 −1
Original line number Diff line number Diff line
@@ -17,7 +17,7 @@
&soc {
};

&blsp1_uart2 {
&blsp1_uart5 {
	status = "ok";
	pinctrl-names = "default";
	pinctrl-0 = <&uart_console_sleep>;
+1 −1
Original line number Diff line number Diff line
@@ -17,7 +17,7 @@
&soc {
};

&blsp1_uart2 {
&blsp1_uart5 {
	status = "ok";
	pinctrl-names = "default";
	pinctrl-0 = <&uart_console_sleep>;
+3 −3
Original line number Diff line number Diff line
@@ -23,11 +23,11 @@

		uart_console_sleep: uart_console_sleep {
			mux {
				pins = "gpio4", "gpio5";
				function = "blsp_uart2";
				pins = "gpio8", "gpio9";
				function = "blsp_uart5";
			};
			config {
				pins = "gpio4", "gpio5";
				pins = "gpio8", "gpio9";
				drive-strength = <2>;
				bias-pull-down;
			};
+1 −1
Original line number Diff line number Diff line
@@ -22,7 +22,7 @@
	qcom,board-id = <15 0>;
};

&blsp1_uart2 {
&blsp1_uart5 {
	status = "ok";
	pinctrl-names = "default";
	pinctrl-0 = <&uart_console_sleep>;
+4 −4
Original line number Diff line number Diff line
@@ -328,11 +328,11 @@
		qcom,pipe-attr-ee;
	};

	blsp1_uart2: serial@78b0000 { /* BLSP1 UART2 */
	blsp1_uart5: serial@78b3000 { /* BLSP1 UART5 */
		compatible = "qcom,msm-lsuart-v14";
		reg = <0x78b0000 0x200>;
		interrupts = <0 108 0>;
		clocks = <&clock_gcc clk_gcc_blsp1_uart2_apps_clk>,
		reg = <0x78b3000 0x200>;
		interrupts = <0 121 0>;
		clocks = <&clock_gcc clk_gcc_blsp1_uart5_apps_clk>,
			 <&clock_gcc clk_gcc_blsp1_ahb_clk>;
		clock-names = "core_clk", "iface_clk";
		status = "disabled";