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Commit f1994926 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "Merge remote-tracking branch 'origin/caf/invensense/master' into msm-3.18"

parents 7a55712a 6810a6ce
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#
# inv-mpu-iio driver for Invensense MPU devices
#

config INV_MPU_IIO
	tristate
	select IIO_BUFFER
	select IIO_KFIFO_BUF
	select IIO_TRIGGER
	select CRC32

choice
	prompt "Chip name"
	depends on INV_MPU_IIO

config INV_MPU_IIO_ICM20648
	bool "ICM20648/ICM20948"
	help
	  Select this if you are using a ICM20648/ICM20948 chip.

config INV_MPU_IIO_ICM20608D
	bool "ICM20608D/ICM20609/ICM20689"
	help
	  Select this if you are using a ICM20608D/ICM20609/ICM20689 chip.

config INV_MPU_IIO_ICM20602
	bool "ICM20602"
	help
	  Select this if you are using a ICM20602 chip.

config INV_MPU_IIO_ICM20690
	bool "ICM20690"
	help
	  Select this if you are using a ICM20690 chip.

config INV_MPU_IIO_IAM20680
	bool "IAM20680"
	help
	  Select this if you are using a IAM20680 chip.

endchoice

config INV_MPU_IIO_I2C
	tristate "Invensense ICM20xxx devices (I2C)"
	depends on I2C && !INV_MPU6050_IIO
	select INV_MPU_IIO
	default n
	help
	  This driver supports Invensense ICM20xxx devices over I2C.
	  This driver can be built as a module. The module will be called
	  inv-mpu-iio-i2c.

config INV_MPU_IIO_SPI
	tristate "Invensense ICM20xxx devices (SPI)"
	depends on SPI_MASTER && !INV_MPU6050_IIO
	select INV_MPU_IIO
	default n
	help
	  This driver supports Invensense ICM20xxx devices over SPI.
	  This driver can be built as a module. The module will be called
	  inv-mpu-iio-spi.

source "drivers/iio/imu/inv_mpu/inv_test/Kconfig"
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#
# Makefile for Invensense inv-mpu-iio device.
#

obj-$(CONFIG_INV_MPU_IIO) += inv-mpu-iio.o

inv-mpu-iio-objs += inv_mpu_common.o
inv-mpu-iio-objs += inv_mpu_ring.o
inv-mpu-iio-objs += inv_mpu_timestamp.o
inv-mpu-iio-objs += inv_mpu_dts.o

# chip support
ifeq ($(CONFIG_INV_MPU_IIO_ICM20648), y)
inv-mpu-iio-objs += icm20648/inv_mpu_init.o
inv-mpu-iio-objs += icm20648/inv_mpu_core.o
inv-mpu-iio-objs += icm20648/inv_mpu_parsing.o
inv-mpu-iio-objs += icm20648/inv_mpu_setup.o
inv-mpu-iio-objs += icm20648/inv_mpu_dmp_fifo.o
inv-mpu-iio-objs += icm20648/inv_slave_compass.o
inv-mpu-iio-objs += icm20648/inv_slave_pressure.o
inv-mpu-iio-objs += icm20648/inv_slave_als.o
inv-mpu-iio-objs += icm20648/inv_mpu_load_dmp.o
inv-mpu-iio-objs += icm20648/inv_mpu_selftest.o
inv-mpu-iio-objs += dmp_support/inv_mpu_misc.o
else ifeq ($(CONFIG_INV_MPU_IIO_ICM20690), y)
inv-mpu-iio-objs += icm20690/inv_mpu_init_20690.o
inv-mpu-iio-objs += icm20690/inv_mpu_core_20690.o
inv-mpu-iio-objs += icm20690/inv_mpu_parsing_20690.o
inv-mpu-iio-objs += icm20690/inv_mpu_setup_20690.o
inv-mpu-iio-objs += icm20690/inv_mpu_selftest_20690.o
inv-mpu-iio-objs += icm20690/inv_slave_compass.o
else ifeq ($(CONFIG_INV_MPU_IIO_ICM20602), y)
inv-mpu-iio-objs += icm20602/inv_mpu_init_20602.o
inv-mpu-iio-objs += icm20602/inv_mpu_core_20602.o
inv-mpu-iio-objs += icm20602/inv_mpu_parsing_20602.o
inv-mpu-iio-objs += icm20602/inv_mpu_setup_20602.o
inv-mpu-iio-objs += icm20602/inv_mpu_selftest_20602.o
else ifeq ($(CONFIG_INV_MPU_IIO_ICM20608D), y)
inv-mpu-iio-objs += icm20608d/inv_mpu_init_20608.o
inv-mpu-iio-objs += icm20608d/inv_mpu_core_20608.o
inv-mpu-iio-objs += icm20608d/inv_mpu_parsing_20608.o
inv-mpu-iio-objs += icm20608d/inv_mpu_setup_20608D.o
inv-mpu-iio-objs += icm20608d/inv_mpu_dmp_fifo.o
inv-mpu-iio-objs += icm20608d/inv_mpu_load_dmp.o
inv-mpu-iio-objs += icm20608d/inv_mpu_selftest_20608.o
inv-mpu-iio-objs += dmp_support/inv_mpu_misc.o
else ifeq ($(CONFIG_INV_MPU_IIO_IAM20680), y)
inv-mpu-iio-objs += iam20680/inv_mpu_init_20680.o
inv-mpu-iio-objs += iam20680/inv_mpu_core_20680.o
inv-mpu-iio-objs += iam20680/inv_mpu_parsing_20680.o
inv-mpu-iio-objs += iam20680/inv_mpu_setup_20680.o
inv-mpu-iio-objs += iam20680/inv_mpu_selftest_20680.o
endif

# Bus support
obj-$(CONFIG_INV_MPU_IIO_I2C) += inv-mpu-iio-i2c.o
inv-mpu-iio-i2c-objs := inv_mpu_i2c.o
obj-$(CONFIG_INV_MPU_IIO_SPI) += inv-mpu-iio-spi.o
inv-mpu-iio-spi-objs := inv_mpu_spi.o

obj-y += inv_test/
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Kernel driver inv-mpu-iio
Author: InvenSense, Inc.


Table of Contents
=================
- Description
- Integrating the Driver in the Linux Kernel
- Dts file
- Communicating with the Driver in Userspace


Description
===========
This document describes how to install the Invensense device driver into a
Linux kernel. The supported chips are listed in Kconfig and user selects an
appropriate one from .e.g. menuconfig.


Integrating the Driver in the Linux Kernel
==========================================
Please add the files as follows (kernel 3.10):
- Copy mpu.h to <kernel_root>/include/linux/iio/imu/
- Copy inv_mpu folder under <kernel_root>/drivers/iio/imu/

In order to see the driver in menuconfig when building the kernel, please
make modifications as shown below:

    add "source "drivers/iio/imu/inv_mpu/Kconfig""
      in <kernel_root>/drivers/iio/imu/Kconfig

    add "obj-y += inv_mpu/"
      in <kernel_root>/drivers/iio/imu/Makefile



Dts file
========
In order to recognize the Invensense device on the I2C/SPI bus, dts(or dtsi)
file must be modified.

Example)
ICM20648 + AK09911/BMP280/APDS9930 on AUX I2C

    i2c@f9968000 {
        /* Invensense */
        mpu6515_acc@68 {
            compatible = "inven,icm20648";
            reg = <0x68>;
            interrupt-parent = <&msmgpio>;
            interrupts = <73 0x2>;
            inven,vdd_ana-supply = <&pm8941_l17>;
            inven,vcc_i2c-supply = <&pm8941_lvs1>;
            inven,gpio_int1 = <&msmgpio 73 0x00>;
            fs_range = <0x00>;
            /* mount matrix */
            axis_map_x = <1>;
            axis_map_y = <0>;
            axis_map_z = <2>;
            negate_x = <0>;
            negate_y = <0>;
            negate_z = <1>;
            poll_interval = <200>;
            min_interval = <5>;
            inven,secondary_reg = <0x0c>;
            /* If no compass sensor,
             * replace "compass" with "none"
             */
            inven,secondary_type = "compass";
            inven,secondary_name = "ak09911";
            inven,secondary_axis_map_x = <1>;
            inven,secondary_axis_map_y = <0>;
            inven,secondary_axis_map_z = <2>;
            inven,secondary_negate_x = <1>;
            inven,secondary_negate_y = <1>;
            inven,secondary_negate_z = <1>;
            /* If no pressure sensor,
             * replace "pressure" with "none"
             */
            inven,aux_type = "pressure";
            inven,aux_name = "bmp280";
            inven,aux_reg = <0x76>;
            /* If no ALS sensor
             * replace "als" with "none"
             */
            inven,read_only_slave_type = "als";
            inven,read_only_slave_name = "apds9930";
            inven,read_only_slave_reg = <0x39>;
        };
    };


Communicating with the Driver in Userspace
==========================================
The driver generates several files in sysfs upon installation.
These files are used to communicate with the driver. The files can be found at:

(I2C) /sys/devices/*.i2c/i2c-*/*-*/iio:device*
(SPI) /sys/devices/*.spi/spi_master/spi*/spi*.*/iio:device*

Group and Owner for all entries should be updated to system/system at
boot time to allow userspace to access properly.


License
=======
Copyright (C) 2018 InvenSense, Inc.

This software is licensed under the terms of the GNU General Public
License version 2, as published by the Free Software Foundation, and
may be copied, distributed, and modified under those terms.

This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.
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/*
 * Copyright (C) 2017-2018 InvenSense, Inc.
 *
 * This software is licensed under the terms of the GNU General Public
 * License version 2, as published by the Free Software Foundation, and
 * may be copied, distributed, and modified under those terms.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#ifndef _INV_MPU_IIO_REG_20680_H_
#define _INV_MPU_IIO_REG_20680_H_

/* Uncomment when HAL does not support the algorithm library
 * for calibration and sensor fusion not to expose unused
 * sysfs entries */
#define SUPPORT_ONLY_BASIC_FEATURES

/* Uncomment to read data registers for sensor data instead of FIFO */
//#define SENSOR_DATA_FROM_REGISTERS

/* Uncomment to enable timer based batching */
#define TIMER_BASED_BATCHING

/* Polling (batch mode) can be enabled only when FIFO read */
#if defined(SENSOR_DATA_FROM_REGISTERS)
#undef TIMER_BASED_BATCHING
#endif

/*register and associated bit definition*/
#define REG_XA_OFFS_H		0x77
#define REG_YA_OFFS_H		0x7A
#define REG_ZA_OFFS_H           0x7D
#define REG_XG_OFFS_USR_H        0x13
#define REG_YG_OFFS_USR_H        0x15
#define REG_ZG_OFFS_USR_H        0x17
#define REG_SAMPLE_RATE_DIV     0x19

#define REG_CONFIG              0x1A
#define EXT_SYNC_SET                      8

#define REG_GYRO_CONFIG		0x1B
#define BITS_SELF_TEST_EN		0xE0
#define SHIFT_GYRO_FS_SEL		0x03

#define REG_ACCEL_CONFIG	0x1C
#define SHIFT_ACCEL_FS			0x03

#define REG_LP_MODE_CTRL	0x1E
#define BIT_GYRO_CYCLE_EN               0x80

#define REG_ACCEL_WOM_THR	0x1F
#define REG_ACCEL_WOM_X_THR	0x20
#define REG_ACCEL_WOM_Y_THR	0x21
#define REG_ACCEL_WOM_Z_THR	0x22

#define REG_ACCEL_MOT_THR       0x1F
#define REG_ACCEL_MOT_DUR       0x20

#define REG_ACCEL_CONFIG_2  0x1D
#define BIT_ACCEL_FCHOCIE_B              0x08

#define REG_FIFO_EN			0x23
#define BITS_GYRO_FIFO_EN	0x70
#define BIT_ACCEL_FIFO_EN	0x08

#define REG_FSYNC_INT		0x36
#define BIT_FSYNC_INT                   0x80

#define REG_INT_PIN_CFG		0x37

#define REG_INT_ENABLE		0x38
#define BIT_WOM_X_INT_EN		0x80
#define BIT_WOM_Y_INT_EN		0x40
#define BIT_WOM_Z_INT_EN		0x20
#define BIT_WOM_ALL_INT_EN		0xE0
#define BIT_FSYNC_INT_EN		0x8
#define BIT_DATA_RDY_EN		        0x1

#define REG_INT_STATUS          0x3A
#define BIT_WOM_X_INT                  0x80
#define BIT_WOM_Y_INT                  0x40
#define BIT_WOM_Z_INT                  0x20

#define REG_RAW_ACCEL           0x3B
#define REG_RAW_TEMP            0x41
#define REG_RAW_GYRO            0x43
#define REG_EXT_SENS_DATA_00    0x49
#define REG_EXT_SENS_DATA_08    0x51
#define REG_EXT_SENS_DATA_09    0x52

#define REG_ACCEL_INTEL_CTRL 0x69
#define BIT_ACCEL_INTEL_EN              0x80
#define BIT_ACCEL_INTEL_MODE            0x40

#define REG_USER_CTRL			0x6A
#define BIT_COND_RST				0x01
#define BIT_FIFO_RST				0x04
#define BIT_FIFO_EN				0x40

#define REG_PWR_MGMT_1			0x6B
#define BIT_H_RESET				0x80
#define BIT_SLEEP					0x40
#define BIT_LP_EN                       	0x20
#define BIT_CLK_PLL				0x01
#define BIT_CLK_MASK				0x07

#define REG_PWR_MGMT_2			0x6C
#define BIT_PWR_ACCEL_STBY		0x38
#define BIT_PWR_GYRO_STBY		0x07
#define BIT_PWR_ALL_OFF			0x3F
#define BIT_FIFO_LP_EN			0x80

#define REG_MEM_BANK_SEL	0x6D
#define REG_MEM_START_ADDR	0x6E
#define REG_MEM_R_W		0x6F

#define REG_FIFO_COUNT_H        0x72
#define REG_FIFO_R_W            0x74
#define REG_WHO_AM_I              0x75

#define REG_6500_XG_ST_DATA     0x50
#define REG_6500_XA_ST_DATA     0xD
#define REG_6500_XA_OFFS_H      0x77
#define REG_6500_YA_OFFS_H      0x7A
#define REG_6500_ZA_OFFS_H      0x7D
#define REG_6500_ACCEL_CONFIG2  0x1D
#define BIT_ACCEL_FCHOCIE_B              0x08
#define BIT_FIFO_SIZE_1K                 0x40

#define REG_LP_MODE_CFG		0x1E

#define REG_6500_LP_ACCEL_ODR   0x1E
#define REG_6500_ACCEL_WOM_THR  0x1F

/* data output control reg 2 */
#define ACCEL_ACCURACY_SET  0x4000
#define GYRO_ACCURACY_SET   0x2000
#define CPASS_ACCURACY_SET  0x1000

/* data definitions */
#define ACCEL_COVARIANCE 0
#define BYTES_PER_SENSOR         6
#define BYTES_FOR_TEMP           2
#define FIFO_COUNT_BYTE          2
#define HARDWARE_FIFO_SIZE       512
#define FIFO_SIZE                (HARDWARE_FIFO_SIZE * 7 / 10)
#define POWER_UP_TIME            100
#define REG_UP_TIME_USEC         100
#define LEFT_OVER_BYTES          128
#define IIO_BUFFER_BYTES         8
#define BASE_SAMPLE_RATE         1000
#define DRY_RUN_TIME             50
#define INV_IAM20680_GYRO_START_TIME 35
#define INV_IAM20680_ACCEL_START_TIME 30
#define MODE_1K_INIT_SAMPLE      5
#define FIRST_SAMPLE_BUF_MS      30

#ifdef BIAS_CONFIDENCE_HIGH
#define DEFAULT_ACCURACY         3
#else
#define DEFAULT_ACCURACY         1
#endif

/* temperature */
#define TEMP_SENSITIVITY        32680   // 326.8 LSB/degC * 100
#define TEMP_OFFSET             2500    // 25 degC * 100

/* enum for sensor */
enum INV_SENSORS {
	SENSOR_ACCEL = 0,
	SENSOR_TEMP,
	SENSOR_GYRO,
	SENSOR_COMPASS,
	SENSOR_NUM_MAX,
	SENSOR_INVALID,
};

enum inv_filter_e {
	INV_FILTER_256HZ_NOLPF2 = 0,
	INV_FILTER_188HZ,
	INV_FILTER_98HZ,
	INV_FILTER_42HZ,
	INV_FILTER_20HZ,
	INV_FILTER_10HZ,
	INV_FILTER_5HZ,
	INV_FILTER_2100HZ_NOLPF,
	NUM_FILTER
};

#define MPU_DEFAULT_DMP_FREQ     200
#define PEDOMETER_FREQ           (MPU_DEFAULT_DMP_FREQ >> 2)
#define SENSOR_FUSION_MIN_RATE   100
#define GESTURE_ACCEL_RATE       50
#define ESI_GYRO_RATE            1000
#define MAX_FIFO_PACKET_READ     6
#define MAX_BATCH_FIFO_SIZE      FIFO_SIZE

#define MIN_MST_ODR_CONFIG       4
#define MAX_MST_ODR_CONFIG       5
/* initial rate is important. For non-DMP mode, it is set as 4 1000/256*/
#define MPU_INIT_SENSOR_RATE     4
#define MAX_MST_NON_COMPASS_ODR_CONFIG 7
#define THREE_AXES               3
#define NINE_ELEM                (THREE_AXES * THREE_AXES)
#define MPU_TEMP_SHIFT           16

#define DMP_DIVIDER              (BASE_SAMPLE_RATE / MPU_DEFAULT_DMP_FREQ)
#define DEFAULT_BATCH_RATE       400
#define DEFAULT_BATCH_TIME    (MSEC_PER_SEC / DEFAULT_BATCH_RATE)

#define TEMPERATURE_SCALE  3340827L
#define TEMPERATURE_OFFSET 1376256L
#define SECONDARY_INIT_WAIT 100
#define MPU_SOFT_REV_ADDR               0x86
#define MPU_SOFT_REV_MASK               0xf
#define SW_REV_LP_EN_MODE               4

/* data limit definitions */
#define MIN_FIFO_RATE            4
#define MAX_FIFO_RATE            MPU_DEFAULT_DMP_FREQ

#define MAX_MPU_MEM              8192
#define MAX_PRS_RATE             281

enum inv_devices {
	ICM20608D,
	ICM20690,
	ICM20602,
	IAM20680,
	INV_NUM_PARTS,
};
#endif
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