Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit f15e4727 authored by Deepak Katragadda's avatar Deepak Katragadda
Browse files

clk: msm: gdsc: Correct reading the HW_CTRL register during enable timeout 



Add a check to read the GDS_HW_CTRL register during gdsc_enable
timeout only if the register exists for the GDSC.

Change-Id: I4011fd7281ed832e15bd6158649131118168d5a1
Signed-off-by: default avatarDeepak Katragadda <dkatraga@codeaurora.org>
parent 50e0173f

drivers/clk/msm/gdsc.c

+8 −3
Original line number Diff line number Diff line
@@ -119,7 +119,7 @@ static int gdsc_is_enabled(struct regulator_dev *rdev) 
static int gdsc_enable(struct regulator_dev *rdev)

{

	struct gdsc *sc = rdev_get_drvdata(rdev);

	uint32_t regval, hw_ctrl_regval;

	uint32_t regval, hw_ctrl_regval = 0x0;

	int i, ret;



	if (sc->root_en || sc->force_root_en)
@@ -160,10 +160,15 @@ static int gdsc_enable(struct regulator_dev *rdev) 
				sc->rdesc.name, regval);

			udelay(TIMEOUT_US);

			regval = readl_relaxed(sc->gdscr);

			hw_ctrl_regval = readl_relaxed(sc->hw_ctrl_addr);

			dev_err(&rdev->dev, "%s final state: 0x%x, GDS_HW_CTRL: 0x%x (%d us after timeout)\n",

			if (sc->hw_ctrl_addr) {

				hw_ctrl_regval =

					readl_relaxed(sc->hw_ctrl_addr);

				dev_err(&rdev->dev, "%s final state (%d us after timeout): 0x%x, GDS_HW_CTRL: 0x%x\n",

					sc->rdesc.name, regval,

					hw_ctrl_regval, TIMEOUT_US);

			} else

				dev_err(&rdev->dev, "%s final state: 0x%x (%d us after timeout)\n",

					sc->rdesc.name, regval, TIMEOUT_US);

			return ret;

		}

	} else {