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Commit f1550a1c authored by Martin Fuzzey's avatar Martin Fuzzey Committed by Shawn Guo
Browse files

ARM: i.MX53: Add clocks for i.mx53 onewire master.

parent 28c55dc1
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+1 −0
Original line number Diff line number Diff line
@@ -171,6 +171,7 @@ clocks and IDs.
	can_sel			156
	can1_serial_gate	157
	can1_ipg_gate		158
	owire_gate		159

Examples (for mx53):

+3 −1
Original line number Diff line number Diff line
@@ -83,6 +83,7 @@ enum imx5_clks {
	ssi2_root_gate, ssi3_root_gate, ssi_ext1_gate, ssi_ext2_gate,
	epit1_ipg_gate, epit1_hf_gate, epit2_ipg_gate, epit2_hf_gate,
	can_sel, can1_serial_gate, can1_ipg_gate,
	owire_gate,
	clk_max
};

@@ -233,6 +234,7 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
	clk[epit1_hf_gate] = imx_clk_gate2("epit1_hf_gate", "per_root", MXC_CCM_CCGR2, 4);
	clk[epit2_ipg_gate] = imx_clk_gate2("epit2_ipg_gate", "ipg", MXC_CCM_CCGR2, 6);
	clk[epit2_hf_gate] = imx_clk_gate2("epit2_hf_gate", "per_root", MXC_CCM_CCGR2, 8);
	clk[owire_gate] = imx_clk_gate2("owire_gate", "per_root", MXC_CCM_CCGR2, 22);

	for (i = 0; i < ARRAY_SIZE(clk); i++)
		if (IS_ERR(clk[i]))