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Commit f08b9c2f authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-apic-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86/apic changes from Ingo Molnar:
 "Most of the changes are about helping virtualized guest kernels
  achieve better performance."

Fix up trivial conflicts with the iommu updates to arch/x86/kernel/apic/io_apic.c

* 'x86-apic-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/apic: Implement EIO micro-optimization
  x86/apic: Add apic->eoi_write() callback
  x86/apic: Use symbolic APIC_EOI_ACK
  x86/apic: Fix typo EIO_ACK -> EOI_ACK and document it
  x86/xen/apic: Add missing #include <xen/xen.h>
  x86/apic: Only compile local function if used with !CONFIG_GENERIC_PENDING_IRQ
  x86/apic: Fix UP boot crash
  x86: Conditionally update time when ack-ing pending irqs
  xen/apic: implement io apic read with hypercall
  Revert "xen/x86: Workaround 'x86/ioapic: Add register level checks to detect bogus io-apic entries'"
  xen/x86: Implement x86_apic_ops
  x86/apic: Replace io_apic_ops with x86_io_apic_ops.
parents d79ee93d 0ab711ae

arch/x86/include/asm/apic.h

+20 −3
Original line number Diff line number Diff line
@@ -138,6 +138,11 @@ static inline void native_apic_msr_write(u32 reg, u32 v) 
	wrmsr(APIC_BASE_MSR + (reg >> 4), v, 0);

}



static inline void native_apic_msr_eoi_write(u32 reg, u32 v)

{

	wrmsr(APIC_BASE_MSR + (APIC_EOI >> 4), APIC_EOI_ACK, 0);

}



static inline u32 native_apic_msr_read(u32 reg)

{

	u64 msr;
@@ -351,6 +356,14 @@ struct apic { 
	/* apic ops */

	u32 (*read)(u32 reg);

	void (*write)(u32 reg, u32 v);

	/*

	 * ->eoi_write() has the same signature as ->write().

	 *

	 * Drivers can support both ->eoi_write() and ->write() by passing the same

	 * callback value. Kernel can override ->eoi_write() and fall back

	 * on write for EOI.

	 */

	void (*eoi_write)(u32 reg, u32 v);

	u64 (*icr_read)(void);

	void (*icr_write)(u32 low, u32 high);

	void (*wait_icr_idle)(void);
@@ -426,6 +439,11 @@ static inline void apic_write(u32 reg, u32 val) 
	apic->write(reg, val);

}



static inline void apic_eoi(void)

{

	apic->eoi_write(APIC_EOI, APIC_EOI_ACK);

}



static inline u64 apic_icr_read(void)

{

	return apic->icr_read();
@@ -450,6 +468,7 @@ static inline u32 safe_apic_wait_icr_idle(void) 


static inline u32 apic_read(u32 reg) { return 0; }

static inline void apic_write(u32 reg, u32 val) { }

static inline void apic_eoi(void) { }

static inline u64 apic_icr_read(void) { return 0; }

static inline void apic_icr_write(u32 low, u32 high) { }

static inline void apic_wait_icr_idle(void) { }
@@ -463,9 +482,7 @@ static inline void ack_APIC_irq(void) 
	 * ack_APIC_irq() actually gets compiled as a single instruction

	 * ... yummie.

	 */



	/* Docs say use 0 for future compatibility */

	apic_write(APIC_EOI, 0);

	apic_eoi();

}



static inline unsigned default_get_apic_id(unsigned long x)

arch/x86/include/asm/apicdef.h

+1 −1
Original line number Diff line number Diff line
@@ -37,7 +37,7 @@ 
#define		APIC_ARBPRI_MASK	0xFFu

#define	APIC_PROCPRI	0xA0

#define	APIC_EOI	0xB0

#define		APIC_EIO_ACK		0x0

#define		APIC_EOI_ACK		0x0 /* Docs say 0 for future compat. */

#define	APIC_RRR	0xC0

#define	APIC_LDR	0xD0

#define		APIC_LDR_MASK		(0xFFu << 24)

arch/x86/include/asm/io_apic.h

+23 −12
Original line number Diff line number Diff line
@@ -5,7 +5,7 @@ 
#include <asm/mpspec.h>

#include <asm/apicdef.h>

#include <asm/irq_vectors.h>



#include <asm/x86_init.h>

/*

 * Intel IO-APIC support for SMP and UP systems.

 *
@@ -21,15 +21,6 @@ 
#define IO_APIC_REDIR_LEVEL_TRIGGER	(1 << 15)

#define IO_APIC_REDIR_MASKED		(1 << 16)



struct io_apic_ops {

	void		(*init)  (void);

	unsigned int	(*read)  (unsigned int apic, unsigned int reg);

	void		(*write) (unsigned int apic, unsigned int reg, unsigned int value);

	void		(*modify)(unsigned int apic, unsigned int reg, unsigned int value);

};



void __init set_io_apic_ops(const struct io_apic_ops *);



/*

 * The structure of the IO-APIC:

 */
@@ -156,7 +147,6 @@ struct io_apic_irq_attr; 
extern int io_apic_set_pci_routing(struct device *dev, int irq,

		 struct io_apic_irq_attr *irq_attr);

void setup_IO_APIC_irq_extra(u32 gsi);

extern void ioapic_and_gsi_init(void);

extern void ioapic_insert_resources(void);



int io_apic_setup_irq_pin_once(unsigned int irq, int node, struct io_apic_irq_attr *attr);
@@ -185,12 +175,29 @@ extern void mp_save_irq(struct mpc_intsrc *m); 


extern void disable_ioapic_support(void);



extern void __init native_io_apic_init_mappings(void);

extern unsigned int native_io_apic_read(unsigned int apic, unsigned int reg);

extern void native_io_apic_write(unsigned int apic, unsigned int reg, unsigned int val);

extern void native_io_apic_modify(unsigned int apic, unsigned int reg, unsigned int val);



static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)

{

	return x86_io_apic_ops.read(apic, reg);

}



static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value)

{

	x86_io_apic_ops.write(apic, reg, value);

}

static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value)

{

	x86_io_apic_ops.modify(apic, reg, value);

}

#else  /* !CONFIG_X86_IO_APIC */



#define io_apic_assign_pci_irqs 0

#define setup_ioapic_ids_from_mpc x86_init_noop

static const int timer_through_8259 = 0;

static inline void ioapic_and_gsi_init(void) { }

static inline void ioapic_insert_resources(void) { }

#define gsi_top (NR_IRQS_LEGACY)

static inline int mp_find_ioapic(u32 gsi) { return 0; }
@@ -212,6 +219,10 @@ static inline int restore_ioapic_entries(void) 


static inline void mp_save_irq(struct mpc_intsrc *m) { };

static inline void disable_ioapic_support(void) { }

#define native_io_apic_init_mappings	NULL

#define native_io_apic_read		NULL

#define native_io_apic_write		NULL

#define native_io_apic_modify		NULL

#endif



#endif /* _ASM_X86_IO_APIC_H */

arch/x86/include/asm/x86_init.h

+8 −1
Original line number Diff line number Diff line
@@ -188,11 +188,18 @@ struct x86_msi_ops { 
	void (*restore_msi_irqs)(struct pci_dev *dev, int irq);

};



struct x86_io_apic_ops {

	void		(*init)  (void);

	unsigned int	(*read)  (unsigned int apic, unsigned int reg);

	void		(*write) (unsigned int apic, unsigned int reg, unsigned int value);

	void		(*modify)(unsigned int apic, unsigned int reg, unsigned int value);

};



extern struct x86_init_ops x86_init;

extern struct x86_cpuinit_ops x86_cpuinit;

extern struct x86_platform_ops x86_platform;

extern struct x86_msi_ops x86_msi;



extern struct x86_io_apic_ops x86_io_apic_ops;

extern void x86_init_noop(void);

extern void x86_init_uint_noop(unsigned int unused);

arch/x86/kernel/apic/apic.c

+7 −5
Original line number Diff line number Diff line
@@ -1326,11 +1326,13 @@ void __cpuinit setup_local_APIC(void) 
			       acked);

			break;

		}

		if (queued) {

			if (cpu_has_tsc) {

				rdtscll(ntsc);

				max_loops = (cpu_khz << 10) - (ntsc - tsc);

			} else

				max_loops--;

		}

	} while (queued && max_loops > 0);

	WARN_ON(max_loops <= 0);