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Commit f08b04f2 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "defconfig: mdm: Enable QPIC NAND config"

parents 15e7e1b3 16d6b832

arch/arm/configs/mdm_defconfig

+1 −0
Original line number Diff line number Diff line
@@ -162,6 +162,7 @@ CONFIG_CMA_SIZE_MBYTES=4 
CONFIG_MTD=y

CONFIG_MTD_CMDLINE_PARTS=y

CONFIG_MTD_BLOCK=y

CONFIG_MTD_MSM_QPIC_NAND=y

CONFIG_MTD_UBI=y

CONFIG_MTD_UBI_FASTMAP=y

CONFIG_BLK_DEV_LOOP=y

drivers/mtd/devices/msm_qpic_nand.c

+9 −3
Original line number Diff line number Diff line
@@ -2851,8 +2851,8 @@ int msm_nand_scan(struct mtd_info *mtd) 
			supported_flash->blksize = flashdev->erasesize;

			supported_flash->oobsize = flashdev->oobsize;

			supported_flash->ecc_correctability =

					flashdev->ecc_correctable_bits;

			if (!flashdev->ecc_correctable_bits)

					flashdev->ecc.strength_ds;

			if (!flashdev->ecc.strength_ds)

				pr_err("num ecc correctable bit not specified and defaults to 4 bit BCH\n");

		}

		supported_flash->flash_id = flash_id;
@@ -3320,7 +3320,7 @@ static int msm_nand_probe(struct platform_device *pdev) 
	struct msm_nand_info *info;

	struct resource *res;

	int i, err, nr_parts;



	struct device *dev;

	/*

	 * The partition information can also be passed from kernel command

	 * line. Also, the MTD core layer supports adding the whole device as
@@ -3371,6 +3371,12 @@ static int msm_nand_probe(struct platform_device *pdev) 
	init_waitqueue_head(&info->nand_chip.dma_wait_queue);

	mutex_init(&info->lock);



	dev = &pdev->dev;

	if (dma_supported(dev, DMA_BIT_MASK(32))) {

		info->dma_mask = DMA_BIT_MASK(32);

		dev->coherent_dma_mask = info->dma_mask;

	}



	info->nand_chip.dma_virt_addr =

		dmam_alloc_coherent(&pdev->dev, MSM_NAND_DMA_BUFFER_SIZE,

			&info->nand_chip.dma_phys_addr, GFP_KERNEL);

drivers/mtd/devices/msm_qpic_nand.h

+1 −0
Original line number Diff line number Diff line
@@ -318,6 +318,7 @@ struct msm_nand_info { 
	struct mutex lock;

	struct flash_identification flash_dev;

	struct msm_nand_clk_data clk_data;

	u64 dma_mask;

};



/* Structure that defines an ONFI parameter page (512B) */

drivers/mtd/mtdpart.c

+1 −1
Original line number Diff line number Diff line
@@ -547,7 +547,7 @@ out_register: 
	return slave;

}



int mtd_add_partition(struct mtd_info *master, const char *name,

int mtd_add_partition(struct mtd_info *master, char *name,

		      long long offset, long long length)

{

	struct mtd_partition part;

drivers/mtd/nand/nand_ids.c

+9 −0
Original line number Diff line number Diff line
@@ -31,6 +31,15 @@ struct nand_flash_dev nand_flash_ids[] = { 
	 * listed by full ID. We list them first so that we can easily identify

	 * the most specific match.

	 */

	{"TC58NYG1S3H 2G 1.8V 8-bit",

		{ .id = {0x98, 0xaa, 0x90, 0x15, 0x00, 0x00, 0x00, 0x00} },

		  SZ_2K, SZ_256, SZ_128K, 0, 4, 128, NAND_ECC_INFO(8, SZ_512)},

	{"MT29F4G08ABBDAHC 4G 3.3V 8-bit",

		{ .id = {0x2c, 0xac, 0x90, 0x15, 0x00, 0x00, 0x00, 0x00} },

		  SZ_2K, SZ_512, SZ_128K, 0, 4, 64, NAND_ECC_INFO(4, SZ_512)},

	{"MT29RZ4B2DZZHGSK 4G 3.3V 8-bit",

		{ .id = {0x2c, 0xac, 0x90, 0x26, 0x00, 0x00, 0x00, 0x00} },

		  SZ_4K, SZ_512, SZ_256K, 0, 4, 224, NAND_ECC_INFO(8, SZ_512)},

	{"TC58NVG2S0F 4G 3.3V 8-bit",

		{ .id = {0x98, 0xdc, 0x90, 0x26, 0x76, 0x15, 0x01, 0x08} },

		  SZ_4K, SZ_512, SZ_256K, 0, 8, 224, NAND_ECC_INFO(4, SZ_512) },