Loading arch/sh/boards/board-sh7785lcr.c +1 −0 Original line number Diff line number Diff line Loading @@ -28,6 +28,7 @@ #include <cpu/sh7785.h> #include <asm/heartbeat.h> #include <asm/clock.h> #include <asm/bl_bit.h> /* * NOTE: This board has 2 physical memory maps. Loading arch/sh/boards/mach-hp6xx/pm.c +1 −0 Original line number Diff line number Diff line Loading @@ -14,6 +14,7 @@ #include <linux/gfp.h> #include <asm/io.h> #include <asm/hd64461.h> #include <asm/bl_bit.h> #include <mach/hp6xx.h> #include <cpu/dac.h> #include <asm/freq.h> Loading arch/sh/kernel/cpu/fpu.c +1 −0 Original line number Diff line number Diff line Loading @@ -2,6 +2,7 @@ #include <linux/slab.h> #include <asm/processor.h> #include <asm/fpu.h> #include <asm/traps.h> int init_fpu(struct task_struct *tsk) { Loading arch/sh/kernel/cpu/sh2a/fpu.c +1 −0 Original line number Diff line number Diff line Loading @@ -14,6 +14,7 @@ #include <asm/processor.h> #include <asm/io.h> #include <asm/fpu.h> #include <asm/traps.h> /* The PR (precision) bit in the FP Status Register must be clear when * an frchg instruction is executed, otherwise the instruction is undefined. Loading arch/sh/kernel/cpu/sh4/fpu.c +1 −0 Original line number Diff line number Diff line Loading @@ -16,6 +16,7 @@ #include <cpu/fpu.h> #include <asm/processor.h> #include <asm/fpu.h> #include <asm/traps.h> /* The PR (precision) bit in the FP Status Register must be clear when * an frchg instruction is executed, otherwise the instruction is undefined. Loading Loading
arch/sh/boards/board-sh7785lcr.c +1 −0 Original line number Diff line number Diff line Loading @@ -28,6 +28,7 @@ #include <cpu/sh7785.h> #include <asm/heartbeat.h> #include <asm/clock.h> #include <asm/bl_bit.h> /* * NOTE: This board has 2 physical memory maps. Loading
arch/sh/boards/mach-hp6xx/pm.c +1 −0 Original line number Diff line number Diff line Loading @@ -14,6 +14,7 @@ #include <linux/gfp.h> #include <asm/io.h> #include <asm/hd64461.h> #include <asm/bl_bit.h> #include <mach/hp6xx.h> #include <cpu/dac.h> #include <asm/freq.h> Loading
arch/sh/kernel/cpu/fpu.c +1 −0 Original line number Diff line number Diff line Loading @@ -2,6 +2,7 @@ #include <linux/slab.h> #include <asm/processor.h> #include <asm/fpu.h> #include <asm/traps.h> int init_fpu(struct task_struct *tsk) { Loading
arch/sh/kernel/cpu/sh2a/fpu.c +1 −0 Original line number Diff line number Diff line Loading @@ -14,6 +14,7 @@ #include <asm/processor.h> #include <asm/io.h> #include <asm/fpu.h> #include <asm/traps.h> /* The PR (precision) bit in the FP Status Register must be clear when * an frchg instruction is executed, otherwise the instruction is undefined. Loading
arch/sh/kernel/cpu/sh4/fpu.c +1 −0 Original line number Diff line number Diff line Loading @@ -16,6 +16,7 @@ #include <cpu/fpu.h> #include <asm/processor.h> #include <asm/fpu.h> #include <asm/traps.h> /* The PR (precision) bit in the FP Status Register must be clear when * an frchg instruction is executed, otherwise the instruction is undefined. Loading