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Commit f01b6b69 authored by Surendar karka's avatar Surendar karka
Browse files

ASoC: wcd9306: Setting DMIC clk lines to low 



DMIC clock lines are high even after recording
is stopped. DMIC clk lines are holding the last
value. Manually forcing the digital mic clock
lines to low.

CRs-Fixed: 1067974
Change-Id: I760416da7ced36bc0a7dfbaca026b2a5e56d0d0c
Signed-off-by: default avatarSurendar karka <sukark@codeaurora.org>
parent 403033bb

sound/soc/codecs/wcd9306.c

+35 −3
Original line number Diff line number Diff line
@@ -2240,17 +2240,44 @@ static int tapan_codec_enable_dmic(struct snd_soc_dapm_widget *w, 
	case SND_SOC_DAPM_PRE_PMU:



		(*dmic_clk_cnt)++;

		if (*dmic_clk_cnt == 1)

		if (*dmic_clk_cnt == 1) {

			snd_soc_update_bits(codec, dmic_clk_reg,

					dmic_clk_en, dmic_clk_en);



			if (dmic_clk_en & 0x01) {

				snd_soc_update_bits(codec,

					TAPAN_A_CDC_DMIC_CLK0_MODE, 0x7, 0x0);

				snd_soc_update_bits(codec,

					TAPAN_A_PIN_CTL_OE0, 0x1, 0x0);

			} else if (dmic_clk_en & 0x10) {

				snd_soc_update_bits(codec,

					TAPAN_A_CDC_DMIC_CLK1_MODE, 0x7, 0x0);

				snd_soc_update_bits(codec,

					TAPAN_A_PIN_CTL_OE0, 0x4, 0x0);

			}

		}

		break;

	case SND_SOC_DAPM_POST_PMD:



		(*dmic_clk_cnt)--;

		if (*dmic_clk_cnt  == 0)

		if (*dmic_clk_cnt  == 0) {

			snd_soc_update_bits(codec, dmic_clk_reg,

					dmic_clk_en, 0);

			if (dmic_clk_en & 0x01) {

				snd_soc_update_bits(codec,

					TAPAN_A_CDC_DMIC_CLK0_MODE, 0x7, 0x4);

				snd_soc_update_bits(codec,

					TAPAN_A_PIN_CTL_OE0, 0x1, 0x1);

				snd_soc_update_bits(codec,

					TAPAN_A_PIN_CTL_DATA0, 0x1, 0x0);

			} else if (dmic_clk_en & 0x10) {

				snd_soc_update_bits(codec,

					TAPAN_A_CDC_DMIC_CLK1_MODE, 0x7, 0x4);

				snd_soc_update_bits(codec,

					TAPAN_A_PIN_CTL_OE0, 0x4, 0x1);

				snd_soc_update_bits(codec,

					TAPAN_A_PIN_CTL_DATA0, 0x4, 0x0);

			}

		}

		break;

	}

	return 0;
@@ -5562,6 +5589,11 @@ static const struct tapan_reg_mask_val tapan_codec_reg_init_val[] = { 
	{TAPAN_A_RX_HPH_CNP_WG_TIME, 0xFF, 0x58},

	{TAPAN_A_RX_HPH_BIAS_WG_OCP, 0xFF, 0x1A},

	{TAPAN_A_RX_HPH_CHOP_CTL, 0xFF, 0x24},



	/* Set DMIC clock lines low */

	{TAPAN_A_CDC_DMIC_CLK0_MODE, 0x7, 0x4},

	{TAPAN_A_CDC_DMIC_CLK1_MODE, 0x7, 0x4},

	{TAPAN_A_PIN_CTL_OE0, 0xA, 0xA},

};



void *tapan_get_afe_config(struct snd_soc_codec *codec,