Merge "ARM: dts: msm: Add codec and WSA device entries" (efcf8b75) · Commits · e / devices / android_kernel_xiaomi_markw

Documentation/devicetree/bindings/sound/qcom-audio-dev.txt

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Documentation/devicetree/bindings/sound/taiko_codec.txt

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Original line number	Diff line number	Diff line
		taiko audio CODEC

		Required properties:

		- compatible : "qcom,taiko-slim-pgd" or "qcom,tapan-slim-pgd" for Tapan codec
		or "qcom,tomtom-slim-pgd" for the Tomtom codec
		or "qcom,tasha-slim-pgd" for Tasha Codec
		- elemental-addr: codec slimbus slave PGD enumeration address.(48 bits)

		- qcom,cdc-reset-gpio: gpio used for codec SOC reset.

		- cdc-vdd-buck-supply: phandle of buck supply's regulator device tree node.
		- qcom,cdc-vdd-buck-voltage: buck supply's voltage level min and max in mV.
		- qcom,cdc-vdd-buck-current: buck supply's max current in mA.

		- cdc-vdd-tx-h-supply: phandle of tx-h supply's regulator device tree node.
		- qcom,cdc-vdd-tx-h-voltage: tx-h supply's voltage level min and max in mV.
		- qcom,cdc-vdd-tx-h-current: tx-h supply's max current in mA.

		- cdc-vdd-rx-h-supply: phandle of rx-h supply's regulator device tree node.
		- qcom,cdc-vdd-rx-h-voltage: rx-h supply's voltage level min and max in mV.
		- qcom,cdc-vdd-rx-h-current: rx-h supply's max current in mA.

		- cdc-vddpx-1-supply: phandle of px-1 supply's regulator device tree node.
		- qcom,cdc-vddpx-1-voltage: px-1 supply's voltage level min and max in mV.
		- qcom,cdc-vddpx-1-current: px-1 supply's max current in mA.

		- cdc-vdd-a-1p2v-supply: phandle of 1.2v supply's regulator device tree node.
		- qcom,cdc-vdd-a-1p2v-voltage: 1.2v supply's voltage level min and max in mV.
		- qcom,cdc-vdd-a-1p2v-current: 1.2v supply's max current in mA.

		- cdc-vddcx-1-supply: phandle of cx-1 supply's regulator device tree node.
		- qcom,cdc-vddcx-1-voltage: cx-1 supply's voltage level min and max in mV.
		- qcom,cdc-vddcx-1-current: cx-1 supply's max current in mA.

		- cdc-vddcx-2-supply: phandle of cx-2 supply's regulator device tree node.
		- qcom,cdc-vddcx-2-voltage: cx-2 supply's voltage level min and max in mV.
		- qcom,cdc-vddcx-2-current: cx-2 supply's max current in mA.

		- cdc-vdd-buckhelper-supply: phandle of helper regulator supply's
		device tree node. This supply is a helper regulator for
		cdc-vdd-buck-supply regulator.
		- cdc-vdd-buckhelper-voltage: helper supply's voltage level min and max in mV.
		- qcom,cdc-vdd-buckhelper-current: helper supply's max current in mA.

		- qcom,cdc-static-supplies: List of supplies to be enabled prior to codec
		hardware probe. Supplies in this list will be
		stay enabled.

		- qcom,cdc-micbias-ldoh-v - LDOH output in volts (should be 1.95 V and 3.00 V).

		- qcom,cdc-micbias-cfilt1-mv - cfilt1 output voltage in milli volts.
		- qcom,cdc-micbias-cfilt2-mv - cfilt2 output voltage in milli volts.
		- qcom,cdc-micbias-cfilt3-mv - cfilt3 output voltage in milli volts.
		cfilt voltage can be set to max of qcom,cdc-micbias-ldoh-v - 0.15V.

		- qcom,cdc-micbias1-cfilt-sel = cfilt to use for micbias1
		(should be from 1 to 3).
		- qcom,cdc-micbias2-cfilt-sel = cfilt to use for micbias2
		(should be from 1 to 3).
		- qcom,cdc-micbias3-cfilt-sel = cfilt to use for micbias3
		(should be from 1 to 3).
		- qcom,cdc-micbias4-cfilt-sel = cfilt to use for micbias4
		(should be from 1 to 3).
		This value represents the connected CFLIT to MIC Bias.

		- qcom,cdc-micbias1-ext-cap: Boolean. Enable micbias 1 external capacitor mode.
		- qcom,cdc-micbias2-ext-cap: Boolean. Enable micbias 2 external capacitor mode.
		- qcom,cdc-micbias3-ext-cap: Boolean. Enable micbias 3 external capacitor mode.
		- qcom,cdc-micbias4-ext-cap: Boolean. Enable micbias 4 external capacitor mode.
		- qcom,cdc-mclk-clk-rate - Specifies the master clock rate in Hz required for
		codec.
		- qcom,cdc-slim-ifd-dev - namme of the codec slim interface device.
		- qcom,cdc-slim-ifd-elemental-addr - codec slimbus slave interface device
		enumeration address.

		Optional properties:
		- cdc-dmic-sample-rate: Specifies the sample rate of digital mic in HZ. The
		values for 9.6MHZ mclk can be 2400000 Hz, 3200000 Hz
		and 4800000 Hz. The values for 12.288MHz mclk can be
		3072200 Hz, 4096000 Hz and 6144000 Hz.

		- qcom,cdc-mad-dmic-rate: Specifies the sample rate of digital mic in HZ to be
		used by MAD (Microphone Activity Detection) hardware
		block on the codec. The valid set of values are same
		as that of cdc-dmic-sample-rate, but this rate will
		only be used by MAD and all other audio use cases
		involving DMIC will use the rate defined by
		cdc-dmic-sample-rate.

		- qcom,cdc-on-demand-supplies: List of supplies which can be enabled
		dynamically.
		Supplies in this list are off by default.

		- qcom,cdc-cp-supplies: List of supplies required for codec chargepump enable
		Supplies in this list can be enabled/disabled dynamically and
		are off by default.

		- qcom,cdc-micbias2-headset-only: Boolean. Allow micbias 2 only to headset mic.

		- qcom,cdc-variant: Indicates codec variant, WCD9XXX indicates all codecs till Taiko
		WCD9330 indicates wcd9330 audio codec

		- qcom,cdc-micbias1-mv: micbias1 output voltage in milli volts.
		This is used when cfilt is not user configurable
		and micbias1 is directly controlled with a register
		write.

		- qcom,cdc-micbias2-mv: micbias2 output voltage in milli volts.
		This is used when cfilt is not user configurable
		and micbias2 is directly controlled with a register
		write.

		- qcom,cdc-micbias3-mv: micbias3 output voltage in milli volts.
		This is used when cfilt is not user configurable
		and micbias3 is directly controlled with a register
		write.

		- qcom,cdc-micbias4-mv: micbias4 output voltage in milli volts.
		This is used when cfilt is not user configurable
		and micbias4 is directly controlled with a register
		write.

		- clock-names : clock name defined for external clock.
		- clocks : external clock defined for codec clock.

		Example:

		taiko_codec {
		compatible = "qcom,taiko-slim-pgd";
		elemental-addr = [00 01 A0 00 17 02];

		qcom,cdc-reset-gpio = <&msmgpio 63 0>;

		cdc-vdd-buck-supply = <&pm8941_s2>;
		qcom,cdc-vdd-buck-voltage = <2150000 2150000>;
		qcom,cdc-vdd-buck-current = <500000>;

		cdc-vdd-tx-h-supply = <&pm8941_s3>;
		qcom,cdc-vdd-tx-h-voltage = <1800000 1800000>;
		qcom,cdc-vdd-tx-h-current = <200000>;

		cdc-vdd-rx-h-supply = <&pm8941_s3>;
		qcom,cdc-vdd-rx-h-voltage = <1800000 1800000>;
		qcom,cdc-vdd-rx-h-current = <200000>;

		cdc-vddpx-1-supply = <&pm8941_s3>;
		qcom,cdc-vddpx-1-voltage = <1800000 1800000>;
		qcom,cdc-vddpx-1-current = <5000>;

		cdc-vdd-a-1p2v-supply = <&pm8941_l1>;
		qcom,cdc-vdd-a-1p2v-voltage = <1225000 1225000>;
		qcom,cdc-vdd-a-1p2v-current = <5000>;

		cdc-vddcx-1-supply = <&pm8941_l1>;
		qcom,cdc-vddcx-1-voltage = <1225000 1225000>;
		qcom,cdc-vddcx-1-current = <5000>;

		cdc-vddcx-2-supply = <&pm8941_l1>;
		qcom,cdc-vddcx-2-voltage = <1225000 1225000>;
		qcom,cdc-vddcx-2-current = <5000>;

		qcom,cdc-static-supplies = "cdc-vdd-buck",
		"cdc-vdd-tx-h",
		"cdc-vdd-rx-h",
		"cdc-vddpx-1",
		"cdc-vdd-a-1p2v",
		"cdc-vddcx-1",
		"cdc-vddcx-2";

		com,cdc-on-demand-supplies = "cdc-vdd-spkdrv";

		qcom,cdc-micbias-ldoh-v = <0x3>;
		qcom,cdc-micbias-cfilt1-mv = <1800>;
		qcom,cdc-micbias-cfilt2-mv = <2700>;
		qcom,cdc-micbias-cfilt3-mv = <1800>;
		qcom,cdc-micbias1-cfilt-sel = <0x0>;
		qcom,cdc-micbias2-cfilt-sel = <0x1>;
		qcom,cdc-micbias3-cfilt-sel = <0x2>;
		qcom,cdc-micbias4-cfilt-sel = <0x2>;
		qcom,cdc-micbias1-ext-cap;
		qcom,cdc-micbias2-ext-cap;
		qcom,cdc-micbias3-ext-cap;
		qcom,cdc-micbias4-ext-cap;
		qcom,cdc-mclk-clk-rate = <9600000>;
		qcom,cdc-slim-ifd = "taiko-slim-ifd";
		qcom,cdc-slim-ifd-elemental-addr = [00 00 A0 00 17 02];
		qcom,cdc-dmic-sample-rate = <4800000>;
		qcom,cdc-micbias2-headset-only;
		};

		Wcd9xxx audio CODEC in I2C mode

		- compatible = "qcom,wcd9xxx-i2c-device";
		- reg: represents the slave address provided to the I2C driver.
		- qcom,cdc-reset-gpio: gpio used for codec SOC reset.

		- cdc-vdd-buck-supply: phandle of buck supply's regulator device tree node.
		- qcom,cdc-vdd-buck-voltage: buck supply's voltage level min and max in mV.
		- qcom,cdc-vdd-buck-current: buck supply's max current in mA.

		- cdc-vdd-tx-h-supply: phandle of tx-h supply's regulator device tree node.
		- qcom,cdc-vdd-tx-h-voltage: tx-h supply's voltage level min and max in mV.
		- qcom,cdc-vdd-tx-h-current: tx-h supply's max current in mA.

		- cdc-vdd-rx-h-supply: phandle of rx-h supply's regulator device tree node.
		- qcom,cdc-vdd-rx-h-voltage: rx-h supply's voltage level min and max in mV.
		- qcom,cdc-vdd-rx-h-current: rx-h supply's max current in mA.

		- cdc-vddpx-1-supply: phandle of px-1 supply's regulator device tree node.
		- qcom,cdc-vddpx-1-voltage: px-1 supply's voltage level min and max in mV.
		- qcom,cdc-vddpx-1-current: px-1 supply's max current in mA.

		- cdc-vdd-a-1p2v-supply: phandle of 1.2v supply's regulator device tree node.
		- qcom,cdc-vdd-a-1p2v-voltage: 1.2v supply's voltage level min and max in mV.
		- qcom,cdc-vdd-a-1p2v-current: 1.2v supply's max current in mA.

		- cdc-vddcx-1-supply: phandle of cx-1 supply's regulator device tree node.
		- qcom,cdc-vddcx-1-voltage: cx-1 supply's voltage level min and max in mV.
		- qcom,cdc-vddcx-1-current: cx-1 supply's max current in mA.

		- cdc-vddcx-2-supply: phandle of cx-2 supply's regulator device tree node.
		- qcom,cdc-vddcx-2-voltage: cx-2 supply's voltage level min and max in mV.
		- qcom,cdc-vddcx-2-current: cx-2 supply's max current in mA.

		- qcom,cdc-static-supplies: List of supplies to be enabled prior to codec
		hardware probe. Supplies in this list will be
		stay enabled.

		- qcom,cdc-micbias-ldoh-v - LDOH output in volts (should be 1.95 V and 3.00 V).

		- qcom,cdc-micbias-cfilt1-mv - cfilt1 output voltage in milli volts.
		- qcom,cdc-micbias-cfilt2-mv - cfilt2 output voltage in milli volts.
		- qcom,cdc-micbias-cfilt3-mv - cfilt3 output voltage in milli volts.
		cfilt voltage can be set to max of qcom,cdc-micbias-ldoh-v - 0.15V.

		- qcom,cdc-micbias1-cfilt-sel = cfilt to use for micbias1
		(should be from 1 to 3).
		- qcom,cdc-micbias2-cfilt-sel = cfilt to use for micbias2
		(should be from 1 to 3).
		- qcom,cdc-micbias3-cfilt-sel = cfilt to use for micbias3
		(should be from 1 to 3).
		- qcom,cdc-micbias4-cfilt-sel = cfilt to use for micbias4
		(should be from 1 to 3).
		This value represents the connected CFLIT to MIC Bias.

		- qcom,cdc-micbias1-ext-cap: Boolean. Enable micbias 1 external capacitor mode.
		- qcom,cdc-micbias2-ext-cap: Boolean. Enable micbias 2 external capacitor mode.
		- qcom,cdc-micbias3-ext-cap: Boolean. Enable micbias 3 external capacitor mode.
		- qcom,cdc-micbias4-ext-cap: Boolean. Enable micbias 4 external capacitor mode.
		- qcom,cdc-mclk-clk-rate - Specifies the master clock rate in Hz required for
		codec.

		Optional properties:

		- cdc-vdd-spkdrv-supply: phandle of spkdrv supply's regulator device tree node.
		- qcom,cdc-vdd-spkdrv-voltage: spkdrv supply voltage level min and max in mV.
		- qcom,cdc-vdd-spkdrv-current: spkdrv supply max current in mA.

		- cdc-vdd-spkdrv-supply: phandle of spkdrv supply's regulator device tree node.
		- qcom,cdc-vdd-spkdrv-voltage: spkdrv supply voltage level min and max in mV.
		- qcom,cdc-vdd-spkdrv-current: spkdrv supply max current in mA.

		- cdc-vdd-spkdrv-2-supply: phandle of spkdrv2 supply's regulator device tree node.
		- qcom,cdc-vdd-spkdrv-2-voltage: spkdrv2 supply voltage level min and max in mV.
		- qcom,cdc-vdd-spkdrv-2-current: spkdrv2 supply max current in mA.

		- qcom,cdc-on-demand-supplies: List of supplies which can be enabled
		dynamically.
		Supplies in this list are off by default.

		Example:
		i2c@f9925000 {
		cell-index = <3>;
		compatible = "qcom,i2c-qup";
		reg = <0xf9925000 0x1000>;
		#address-cells = <1>;
		#size-cells = <0>;
		reg-names = "qup_phys_addr";
		interrupts = <0 97 0>;
		interrupt-names = "qup_err_intr";
		qcom,i2c-bus-freq = <100000>;
		qcom,i2c-src-freq = <24000000>;

		wcd9xxx_codec@0d{
		compatible = "qcom,wcd9xxx-i2c";
		reg = <0x0d>;
		qcom,cdc-reset-gpio = <&msmgpio 22 0>;
		interrupt-parent = <&wcd9xxx_intc>;
		interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
		20 21 22 23 24 25 26 27 28>;

		cdc-vdd-buck-supply = <&pm8019_l11>;
		qcom,cdc-vdd-buck-voltage = <1800000 1800000>;
		qcom,cdc-vdd-buck-current = <25000>;

		cdc-vdd-tx-h-supply = <&pm8019_l11>;
		qcom,cdc-vdd-tx-h-voltage = <1800000 1800000>;
		qcom,cdc-vdd-tx-h-current = <25000>;

		cdc-vdd-rx-h-supply = <&pm8019_l11>;
		qcom,cdc-vdd-rx-h-voltage = <1800000 1800000>;
		qcom,cdc-vdd-rx-h-current = <25000>;

		cdc-vddpx-1-supply = <&pm8019_l11>;
		qcom,cdc-vddpx-1-voltage = <1800000 1800000>;
		qcom,cdc-vddpx-1-current = <10000>;

		cdc-vdd-a-1p2v-supply = <&pm8019_l9>;
		qcom,cdc-vdd-a-1p2v-voltage = <1200000 1200000>;
		qcom,cdc-vdd-a-1p2v-current = <10000>;

		cdc-vddcx-1-supply = <&pm8019_l9>;
		qcom,cdc-vddcx-1-voltage = <1200000 1200000>;
		qcom,cdc-vddcx-1-current = <10000>;

		cdc-vddcx-2-supply = <&pm8019_l9>;
		qcom,cdc-vddcx-2-voltage = <1200000 1200000>;
		qcom,cdc-vddcx-2-current = <10000>;

		qcom,cdc-static-supplies = "cdc-vdd-buck",
		"cdc-vdd-tx-h",
		"cdc-vdd-rx-h",
		"cdc-vddpx-1",
		"cdc-vdd-a-1p2v",
		"cdc-vddcx-1",
		"cdc-vddcx-2";

		cdc-vdd-spkdrv-supply = <&pmi8994_boost>;
		qcom,cdc-vdd-spkdrv-voltage = <5000000 5000000>;
		qcom,cdc-vdd-spkdrv-current = <600000>;

		cdc-vdd-spkdrv-2-supply = <&pmi8994_boost>;
		qcom,cdc-vdd-spkdrv-2-voltage = <5000000 5000000>;
		qcom,cdc-vdd-spkdrv-2-current = <600000>;

		qcom,cdc-on-demand-supplies = "cdc-vdd-spkdrv",
		"cdc-vdd-spkdrv-2";

		qcom,cdc-micbias-ldoh-v = <0x3>;
		qcom,cdc-micbias-cfilt1-mv = <1800>;
		qcom,cdc-micbias-cfilt2-mv = <2700>;
		qcom,cdc-micbias-cfilt3-mv = <1800>;
		qcom,cdc-micbias1-cfilt-sel = <0x0>;
		qcom,cdc-micbias2-cfilt-sel = <0x1>;
		qcom,cdc-micbias3-cfilt-sel = <0x2>;
		qcom,cdc-micbias4-cfilt-sel = <0x2>;
		qcom,cdc-mclk-clk-rate = <12288000>;
		};

		wcd9xxx_codec@77{
		compatible = "qcom,wcd9xxx-i2c";
		reg = <0x77>;
		};

		wcd9xxx_codec@66{
		compatible = "qcom,wcd9xxx-i2c";
		reg = <0x66>;
		};
		wcd9xxx_codec@55{
		compatible = "qcom,wcd9xxx-i2c";
		reg = <0x55>;
		};
		};

		Tombak audio CODEC in SPMI mode

		- compatible = "qcom,msm8x16_wcd_codec";
		- reg: represents the slave base address provided to the peripheral.
		- interrupt-parent : The parent interrupt controller.
		- interrupts: List of interrupts in given SPMI peripheral.
		- interrupt-names: Names specificed to above list of interrupts in same
		order.

		Optional properties:

		- cdc-vdda-cp-supply: phandle of cp supply's regulator device tree node.
		- qcom,cdc-vdda-cp-voltage: cp supply's voltage level min and max in mV.
		- qcom,cdc-vdda-cp-current: cp supply's max current in mA.

		- cdc-vdda-rx-h-supply: phandle of vdda-rx-h supply's regulator device tree node.
		- qcom,cdc-vdda-rx-h-voltage: vdda-rx-h supply's voltage level min and max in mV.
		- qcom,cdc-vdda-rx-h-current: vdda-rx-h supply's max current in mA.

		- cdc-vdda-tx-h-supply: phandle of vdda-tx-h supply's regulator device tree node.
		- qcom,cdc-vdda-tx-h-voltage: vdda-tx-h supply's voltage level min and max in mV.
		- qcom,cdc-vdda-tx-h-current: vdda-tx-h supply's max current in mA.

		- cdc-vdd-px-supply: phandle of vdd-px supply's regulator device tree node.
		- qcom,cdc-vdd-px-voltage: vdd-px supply's voltage level min and max in mV.
		- qcom,cdc-vdd-px-current: vdd-px supply's max current in mA.

		- cdc-vdd-pa-supply: phandle of vdd-pa supply's regulator device tree node.
		- qcom,cdc-vdd-pa-voltage: vdd-pa supply's voltage level min and max in mV.
		- qcom,cdc-vdd-pa-current: vdd-pa supply's max current in mA.

		- cdc-vdd-mic-bias-supply: phandle of mic-bias supply's regulator device tree
		node.
		- qcom,cdc-vdd-mic-bias-voltage: mic-bias supply's voltage level min and max
		in mV.
		- qcom,cdc-vdd-mic-bias-current: mic-bias supply's max current in mA.

		- qcom,cdc-mclk-clk-rate: Specifies the master clock rate in Hz required for
		codec.

		- qcom,cdc-static-supplies: List of supplies to be enabled prior to codec
		hardware probe. Supplies in this list will be
		stay enabled.

		- qcom,cdc-on-demand-supplies: List of supplies which can be enabled
		dynamically.
		Supplies in this list are off by default.
		- qcom,cdc-micbias-cfilt-mv : MICBIAS voltage value
		- qcom,cdc-boost-voltage: Specifies the analog boost output voltage value.
		Value from 4000 to 5550 in mV in steps of 50 mV can be given.
		- qcom,dig-cdc-base-addr: Specifies the digital codec base address for MSM digital
		core register writes.

		Example:
		msm8x16_wcd_codec@f000{
		compatible = "qcom,msm8x16_wcd_codec";
		reg = <0xf000 0x100>;
		interrupt-parent = <&spmi_bus>;
		interrupts = <0x1 0xf0 0x0>,
		<0x1 0xf0 0x1>,
		<0x1 0xf0 0x2>,
		<0x1 0xf0 0x3>,
		<0x1 0xf0 0x4>,
		<0x1 0xf0 0x5>,
		<0x1 0xf0 0x6>,
		<0x1 0xf0 0x7>;
		interrupt-names = "spk_cnp_int",
		"spk_clip_int",
		"spk_ocp_int",
		"ins_rem_det1",
		"but_rel_det",
		"but_press_det",
		"ins_rem_det",
		"mbhc_int";

		cdc-vdda-cp-supply = <&pm8916_s4>;
		qcom,cdc-vdda-cp-voltage = <1800000 2200000>;
		qcom,cdc-vdda-cp-current = <770000>;

		cdc-vdda-rx-h-supply = <&pm8916_l5>;
		qcom,cdc-vdda-rx-h-voltage = <1800000 1800000>;
		qcom,cdc-vdda-rx-h-current = <20000>;

		cdc-vdda-tx-h-supply = <&pm8916_l5>;
		qcom,cdc-vdda-tx-h-voltage = <1800000 1800000>;
		qcom,cdc-vdda-tx-h-current = <20000>;

		cdc-vdd-px-supply = <&pm8916_s4>;
		qcom,cdc-vdd-px-voltage = <1800000 2200000>;
		qcom,cdc-vdd-px-current = <770000>;

		cdc-vdd-pa-supply = <&pm8916_l5>;
		qcom,cdc-vdd-pa-voltage = <1800000 1800000>;
		qcom,cdc-vdd-pa-current = <5000>;

		cdc-vdd-mic-bias-supply = <&pm8916_l13>;
		qcom,cdc-vdd-mic-bias-voltage = <3075000 3075000>;
		qcom,cdc-vdd-mic-bias-current = <25000>;

		qcom,cdc-mclk-clk-rate = <9600000>;

		qcom,cdc-static-supplies = "cdc-vdda-h",
		"cdc-vdd-px",
		"cdc-vdd-pa",
		"cdc-vdda-cp";

		qcom,cdc-on-demand-supplies = "cdc-vdd-mic-bias";
		qcom,dig-cdc-base-addr = <0xc0f0000>;
		};

Documentation/devicetree/bindings/sound/wsa881x-analog.txt

0 → 100644

+88 −0

Original line number	Diff line number	Diff line
		wsa881x Audio CODEC

		wsa881x Audio CODEC can support either I2C interface or Soundwire interface.
		In Analog mode, this codec will operate as I2C slave device and
		interacts with I2C controller for status, control and interrupt management.
		The wsa881x device nodes will be represented as child nodes to I2C
		master device node in the devicetree. Currently, the below devicetree
		bindings are for I2C mode only and does not include soundwire mode.

		Required properties:

		- compatible : "qcom,wsa881x-i2c-codec"
		- reg : Unique device ID of I2C slave device.

		Optional properties:
		- qcom,msm-gpios : Lists down all the gpio sets that are supported.
		- qcom,pinctrl-names : Lists all the possible combinations of the gpio sets
		mentioned in qcom,msm-gpios. Say we have 2^N combinations for N GPIOs, this
		list all 2^N combinations.
		- pinctrl-names : The combinations of gpio sets from above that are supported in
		the flavor. This can be sometimes same as qcom, pinctrl-names i.e with 2^N
		combinations or will have less incase if some combination is not supported.
		- pinctrl-# : Pinctrl states as mentioned in pinctrl-names.

		* wsa_intc

		Required properties:

		- compatible : "qcom,wsa-irq"
		- interrupt-controller : Mark this device node as an
		interrupt controller
		- #interrupt-cells : Should be 1
		- interrupt-parent : Parent interrupt controller
		- interrupts : Interrupt number on the parent
		interrupt controller
		- interrupt-names : Name of interrupt on the parent
		interrupt controller
		Example:

		wsa881x-i2c-codec@0e {
		compatible = "qcom,wsa881x-i2c-codec";
		reg = <0x0e>;
		qcom,msm-gpios = "wsa_clk",
		"wsa_reset";
		qcom,pinctrl-names = "all_off",
		"wsa_clk",
		"wsa_active",
		"wsa_clk_active";
		pinctrl-names = "all_off",
		"wsa_clk",
		"wsa_active",
		"wsa_clk_active";
		pinctrl-0 = <&wsa_clk_off &wsa_suspend>;
		pinctrl-1 = <&wsa_clk_on &wsa_suspend>;
		pinctrl-2 = <&wsa_clk_off &wsa_active>;
		pinctrl-3 = <&wsa_clk_on &wsa_active>;
		};

		wsa881x-i2c-codec@44 {
		compatible = "qcom,wsa881x-i2c-codec";
		reg = <0x44>;
		};

		wsa881x-i2c-codec@0f {
		compatible = "qcom,wsa881x-i2c-codec";
		reg = <0x0f>;
		qcom,msm-gpios = "wsa_clk",
		"wsa_reset";
		qcom,pinctrl-names = "all_off",
		"wsa_clk",
		"wsa_active",
		"wsa_clk_active";
		pinctrl-names = "all_off",
		"wsa_active",
		"wsa_clk_active";
		pinctrl-0 = <&wsa_clk_off &wsa_suspend>;
		pinctrl-1 = <&wsa_clk_off &wsa_active>;
		pinctrl-2 = <&wsa_clk_on &wsa_active>;
		};

		wsa_intc: wsa-irq {
		compatible = "qcom,wsa-irq";
		interrupt-controller;
		#interrupt-cells = <1>;
		interrupt-parent = <&msm_gpio>;
		interrupts = <97 0>;
		interrupt-names = "wsa-int";
		};

arch/arm/boot/dts/qcom/msm8952-cdp.dtsi

+85 −2

Original line number	Diff line number	Diff line
		@@ -111,10 +111,12 @@
		qcom,model = "msm8952-snd-card";
		reg = <0xc051000 0x4>,
		<0xc051004 0x4>,
		<0xc055000 0x4>;
		<0xc055000 0x4>,
		<0xc052000 0x4>;
		reg-names = "csr_gp_io_mux_mic_ctl",
		"csr_gp_io_mux_spkr_ctl",
		"csr_gp_io_lpaif_pri_pcm_pri_mode_muxsel";
		"csr_gp_io_lpaif_pri_pcm_pri_mode_muxsel",
		"csr_gp_io_mux_quin_ctl";

		qcom,msm-ext-pa = "primary";
		qcom,msm-mclk-freq = <9600000>;
		@@ -132,6 +134,7 @@
		"AMIC1", "MIC BIAS External",
		"AMIC2", "MIC BIAS External2",
		"AMIC3", "MIC BIAS External",
		"WSA_SPK OUT", "VDD_WSA_SWITCH",
		"SpkrMono WSA_IN", "WSA_SPK OUT";
		qcom,msm-gpios =
		"pri_i2s",
		@@ -162,6 +165,7 @@
		"msm-voice-svc";
		asoc-cpu = <&dai_pri_auxpcm>, <&dai_hdmi>,
		<&dai_mi2s0>, <&dai_mi2s1>, <&dai_mi2s2>, <&dai_mi2s3>,
		<&dai_mi2s5>, <&dai_mi2s6>,
		<&sb_0_rx>, <&sb_0_tx>, <&sb_1_rx>, <&sb_1_tx>,
		<&sb_3_rx>, <&sb_3_tx>, <&sb_4_rx>, <&sb_4_tx>,
		<&bt_sco_rx>, <&bt_sco_tx>, <&int_fm_rx>, <&int_fm_tx>,
		@@ -171,6 +175,7 @@
		asoc-cpu-names = "msm-dai-q6-auxpcm.1", "msm-dai-q6-hdmi.8",
		"msm-dai-q6-mi2s.0", "msm-dai-q6-mi2s.1",
		"msm-dai-q6-mi2s.2", "msm-dai-q6-mi2s.3",
		"msm-dai-q6-mi2s.5", "msm-dai-q6-mi2s.6",
		"msm-dai-q6-dev.16384", "msm-dai-q6-dev.16385",
		"msm-dai-q6-dev.16386", "msm-dai-q6-dev.16387",
		"msm-dai-q6-dev.16390", "msm-dai-q6-dev.16391",
		@@ -183,6 +188,84 @@
		"msm-dai-q6-dev.32773", "msm-dai-q6-dev.32770";
		asoc-codec = <&stub_codec>, <&pm8950_cajon_dig>;
		asoc-codec-names = "msm-stub-codec.1", "cajon_codec";
		asoc-wsa-codec-names = "wsa881x-i2c-codec.8-000f";
		asoc-wsa-codec-prefixes = "SpkrMono";

		msm-vdd-wsa-switch-supply = <&pm8950_l13>;
		qcom,msm-vdd-wsa-switch-voltage = <3075000>;
		qcom,msm-vdd-wsa-switch-current = <5000>;
		};
		i2c@7af8000 {
		wsa881x-i2c-codec@e {
		compatible = "qcom,wsa881x-i2c-codec";
		reg = <0x0e>;
		qcom,msm-gpios = "wsa_clk",
		"wsa_reset",
		"wsa_vi";
		qcom,pinctrl-names = "all_off",
		"wsa_clk",
		"wsa_active",
		"wsa_clk_active",
		"wsa_vi",
		"wsa_clk_vi",
		"wsa_active_vi",
		"wsa_all";
		pinctrl-names = "all_off",
		"wsa_clk",
		"wsa_active",
		"wsa_clk_active",
		"wsa_vi",
		"wsa_clk_vi",
		"wsa_active_vi",
		"wsa_all";
		pinctrl-0 = <&wsa_clk_off &wsa_reset_off &wsa_vi_off>;
		pinctrl-1 = <&wsa_clk_on &wsa_reset_off &wsa_vi_off>;
		pinctrl-2 = <&wsa_clk_off &wsa_reset_on &wsa_vi_off>;
		pinctrl-3 = <&wsa_clk_on &wsa_reset_on &wsa_vi_off>;
		pinctrl-4 = <&wsa_clk_off &wsa_reset_off &wsa_vi_on>;
		pinctrl-5 = <&wsa_clk_on &wsa_reset_off &wsa_vi_on>;
		pinctrl-6 = <&wsa_clk_off &wsa_reset_on &wsa_vi_on>;
		pinctrl-7 = <&wsa_clk_on &wsa_reset_on &wsa_vi_on>;
		};
		wsa881x-i2c-codec@44 {
		compatible = "qcom,wsa881x-i2c-codec";
		reg = <0x44>;
		};
		wsa881x-i2c-codec@f {
		compatible = "qcom,wsa881x-i2c-codec";
		reg = <0x0f>;
		qcom,msm-gpios = "wsa_clk",
		"wsa_reset",
		"wsa_vi";
		qcom,pinctrl-names = "all_off",
		"wsa_clk",
		"wsa_active",
		"wsa_clk_active",
		"wsa_vi",
		"wsa_clk_vi",
		"wsa_active_vi",
		"wsa_all";
		pinctrl-names = "all_off",
		"wsa_clk",
		"wsa_active",
		"wsa_clk_active",
		"wsa_vi",
		"wsa_clk_vi",
		"wsa_active_vi",
		"wsa_all";
		pinctrl-0 = <&wsa_clk_off &wsa_reset_off &wsa_vi_off>;
		pinctrl-1 = <&wsa_clk_on &wsa_reset_off &wsa_vi_off>;
		pinctrl-2 = <&wsa_clk_off &wsa_reset_on &wsa_vi_off>;
		pinctrl-3 = <&wsa_clk_on &wsa_reset_on &wsa_vi_off>;
		pinctrl-4 = <&wsa_clk_off &wsa_reset_off &wsa_vi_on>;
		pinctrl-5 = <&wsa_clk_on &wsa_reset_off &wsa_vi_on>;
		pinctrl-6 = <&wsa_clk_off &wsa_reset_on &wsa_vi_on>;
		pinctrl-7 = <&wsa_clk_on &wsa_reset_on &wsa_vi_on>;
		};
		wsa881x-i2c-codec@45 {
		compatible = "qcom,wsa881x-i2c-codec";
		reg = <0x45>;
		};
		};
		};

arch/arm/boot/dts/qcom/msm8952-iommu-domains.dtsi

+2 −1

Original line number	Diff line number	Diff line
		@@ -13,10 +13,11 @@
		&soc {
		qcom,iommu-domains {
		compatible = "qcom,iommu-domains";
		qcom,iommu-domain1 {
		lpass_q6_smmu: qcom,iommu-domain1 {
		label = "lpass_audio";
		qcom,iommu-contexts = <&adsp_io>;
		qcom,virtual-addr-pool = <0x10000000 0x0FFFFFFF>;
		#iommu-cells = <1>;
		};
		/*
		* non-secure addr pool from 1500 MB to 3532 MB