Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit ef6ac8bd authored by Tony Truong's avatar Tony Truong
Browse files

msm: pcie: add support to distingush between PCIe PHY ver 



PCIe bus driver can now use devicetree to help distingush
which PCIe QMP PHY version is being used. This will allow
PCIe bus driver to choose the correct PCIe PHY sequence.

Change-Id: I74c67431b75292bb1db3e4b97d89d69de9b6f11b
Signed-off-by: default avatarTony Truong <truong@codeaurora.org>
parent 77813844

Documentation/devicetree/bindings/pci/msm_pcie.txt

+2 −0
Original line number Diff line number Diff line
@@ -72,6 +72,7 @@ Optional Properties: 
    endpoint.

  - qcom,n-fts: The number of fast training sequences sent when the link state

    is changed from L0s to L0.

  - qcom,pcie-phy-ver: version of PCIe PHY.

  - qcom,ep-wakeirq: The endpoint will issue wake signal when it is up, and the

    root complex has the capability to enumerate the endpoint for this case.

  - qcom,msi-gicm-addr: MSI address for GICv2m.
@@ -217,6 +218,7 @@ Example: 
		qcom,l1ss-supported;

		qcom,aux-clk-sync;

		qcom,n-fts = <0x50>;

		qcom,pcie-phy-ver = <1>;

		qcom,ep-wakeirq;

		qcom,msi-gicm-addr = <0xf9040040>;

		qcom,msi-gicm-base = <0x160>;

drivers/pci/host/pci-msm.c

+22 −0
Original line number Diff line number Diff line
@@ -508,6 +508,7 @@ struct msm_pcie_dev_t { 
	bool				 ep_wakeirq;



	uint32_t			   rc_idx;

	uint32_t			phy_ver;

	bool				drv_ready;

	bool				 enumerated;

	struct work_struct	     handle_wake_work;
@@ -1142,6 +1143,11 @@ static void pcie_phy_init(struct msm_pcie_dev_t *dev) 
	msm_pcie_write_reg(dev->phy, QSERDES_COM_CLK_EP_DIV, 0x19);

	msm_pcie_write_reg(dev->phy, QSERDES_COM_CLK_ENABLE1, 0x10);



	if (dev->phy_ver == 0x3) {

		msm_pcie_write_reg(dev->phy, QSERDES_COM_HSCLK_SEL, 0x00);

		msm_pcie_write_reg(dev->phy, QSERDES_COM_RESCODE_DIV_NUM, 0x40);

	}



	if (dev->common_phy) {

		msm_pcie_write_reg(dev->phy, PCIE_COM_SW_RESET, 0x00);

		msm_pcie_write_reg(dev->phy, PCIE_COM_START_CONTROL, 0x03);
@@ -1452,6 +1458,8 @@ static void msm_pcie_show_status(struct msm_pcie_dev_t *dev) 
		dev->ext_ref_clk);

	pr_alert("ep_wakeirq is %d\n",

		dev->ep_wakeirq);

	pr_alert("phy_ver is %d\n",

		dev->phy_ver);

	pr_alert("drv_ready is %d\n",

		dev->drv_ready);

	pr_alert("the link is %s suspending\n",
@@ -5013,6 +5021,20 @@ static int msm_pcie_probe(struct platform_device *pdev) 
		"PCIe: EP of RC%d does %s assert wake when it is up.\n",

		rc_idx, msm_pcie_dev[rc_idx].ep_wakeirq ? "" : "not");



	msm_pcie_dev[rc_idx].phy_ver = 1;

	ret = of_property_read_u32((&pdev->dev)->of_node,

				"qcom,pcie-phy-ver",

				&msm_pcie_dev[rc_idx].phy_ver);

	if (ret)

		PCIE_DBG(&msm_pcie_dev[rc_idx],

			"RC%d: pcie-phy-ver does not exist.\n",

			msm_pcie_dev[rc_idx].rc_idx);

	else

		PCIE_DBG(&msm_pcie_dev[rc_idx],

			"RC%d: pcie-phy-ver: %d.\n",

			msm_pcie_dev[rc_idx].rc_idx,

			msm_pcie_dev[rc_idx].phy_ver);



	msm_pcie_dev[rc_idx].n_fts = 0;

	ret = of_property_read_u32((&pdev->dev)->of_node,

				"qcom,n-fts",