Loading drivers/platform/msm/mhi/mhi.h +19 −6 Original line number Diff line number Diff line Loading @@ -66,13 +66,20 @@ struct bhi_ctxt_t { struct device *dev; }; enum MHI_CHAN_TYPE { enum MHI_CHAN_DIR { MHI_INVALID = 0x0, MHI_OUT = 0x1, MHI_IN = 0x2, MHI_CHAN_TYPE_reserved = 0x80000000 }; enum MHI_RING_CLASS { MHI_RING_INVALID = 0x0, MHI_HW_RING = 0x1, MHI_SW_RING = 0x2, MHI_RING_TYPE_reserved = 0x80000000 }; enum MHI_CHAN_STATE { MHI_CHAN_STATE_DISABLED = 0x0, MHI_CHAN_STATE_ENABLED = 0x1, Loading Loading @@ -130,7 +137,7 @@ struct __packed mhi_event_ctxt { struct __packed mhi_chan_ctxt { enum MHI_CHAN_STATE mhi_chan_state; enum MHI_CHAN_TYPE mhi_chan_type; enum MHI_CHAN_DIR mhi_chan_type; u32 mhi_event_ring_index; u64 mhi_trb_ring_base_addr; u64 mhi_trb_ring_len; Loading Loading @@ -262,7 +269,7 @@ struct mhi_ring { uintptr_t len; uintptr_t el_size; u32 overwrite_en; enum MHI_CHAN_TYPE dir; enum MHI_CHAN_DIR dir; }; enum MHI_CMD_STATUS { Loading Loading @@ -378,6 +385,7 @@ struct mhi_counters { u32 mhi_ready_cntr; u32 m3_event_timeouts; u32 m0_event_timeouts; u32 m2_event_timeouts; u32 msi_disable_cntr; u32 msi_enable_cntr; u32 nr_irq_migrations; Loading Loading @@ -424,6 +432,10 @@ struct dev_mmio_info { void __iomem *cmd_db_addr; u64 mmio_len; u32 nr_event_rings; u32 nr_hw_event_rings; u32 nr_sw_event_rings; u32 nr_sw_xfer_rings; u32 nr_hw_xfer_rings; dma_addr_t dma_ev_ctxt; /* Bus address of ECABAP*/ }; Loading Loading @@ -527,6 +539,7 @@ struct mhi_event_ring_cfg { u32 msi_vec; u32 intmod; u32 flags; enum MHI_RING_CLASS class; enum MHI_EVENT_RING_STATE state; irqreturn_t (*mhi_handler_ptr)(int , void *); }; Loading Loading @@ -562,7 +575,7 @@ int mhi_init_chan_ctxt(struct mhi_chan_ctxt *cc_list, uintptr_t trb_list_phy, uintptr_t trb_list_virt, u64 el_per_ring, enum MHI_CHAN_TYPE chan_type, enum MHI_CHAN_DIR chan_type, u32 event_ring, struct mhi_ring *ring, enum MHI_CHAN_STATE chan_state); Loading Loading @@ -596,8 +609,8 @@ enum MHI_STATUS mhi_init_state_transition(struct mhi_device_ctxt *mhi_dev_ctxt, enum STATE_TRANSITION new_state); enum MHI_STATUS mhi_wait_for_mdm(struct mhi_device_ctxt *mhi_dev_ctxt); enum hrtimer_restart mhi_initiate_m1(struct hrtimer *timer); int mhi_pci_suspend(struct pci_dev *dev, pm_message_t state); int mhi_pci_resume(struct pci_dev *dev); int mhi_pci_suspend(struct device *dev); int mhi_pci_resume(struct device *dev); int mhi_init_pcie_device(struct mhi_pcie_dev_info *mhi_pcie_dev); int mhi_init_pm_sysfs(struct device *dev); void mhi_rem_pm_sysfs(struct device *dev); Loading drivers/platform/msm/mhi/mhi_event.c +9 −1 Original line number Diff line number Diff line /* Copyright (c) 2015, The Linux Foundation. All rights reserved. /* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -68,6 +68,14 @@ int mhi_populate_event_cfg(struct mhi_device_ctxt *mhi_dev_ctxt) else mhi_dev_ctxt->ev_ring_props[i].mhi_handler_ptr = mhi_msi_ipa_handlr; if (MHI_HW_RING == GET_EV_PROPS(EV_TYPE, mhi_dev_ctxt->ev_ring_props[i].flags)) { mhi_dev_ctxt->ev_ring_props[i].class = MHI_HW_RING; mhi_dev_ctxt->mmio_info.nr_sw_event_rings++; } else { mhi_dev_ctxt->ev_ring_props[i].class = MHI_SW_RING; mhi_dev_ctxt->mmio_info.nr_hw_event_rings++; } } dt_error: return r; Loading drivers/platform/msm/mhi/mhi_iface.c +6 −6 Original line number Diff line number Diff line Loading @@ -208,17 +208,17 @@ msi_config_err: } static const struct dev_pm_ops pm_ops = { .runtime_suspend = mhi_runtime_suspend, .runtime_resume = mhi_runtime_resume, .runtime_idle = NULL, SET_RUNTIME_PM_OPS(mhi_runtime_suspend, mhi_runtime_resume, NULL) SET_SYSTEM_SLEEP_PM_OPS(mhi_pci_suspend, mhi_pci_resume) }; static struct pci_driver mhi_pcie_driver = { .name = "mhi_pcie_drv", .id_table = mhi_pcie_device_id, .probe = mhi_pci_probe, .suspend = mhi_pci_suspend, .resume = mhi_pci_resume, .driver = { .pm = &pm_ops } }; static int mhi_pci_probe(struct pci_dev *pcie_device, Loading @@ -239,6 +239,7 @@ static int mhi_pci_probe(struct pci_dev *pcie_device, mhi_devices.nr_of_devices++; plat_dev = mhi_devices.device_list[nr_dev].plat_dev; pcie_device->dev.of_node = plat_dev->dev.of_node; pm_runtime_put_noidle(&pcie_device->dev); mhi_pcie_dev->pcie_device = pcie_device; mhi_pcie_dev->mhi_pcie_driver = &mhi_pcie_driver; mhi_pcie_dev->mhi_pci_link_event.events = Loading Loading @@ -272,7 +273,6 @@ static struct platform_driver mhi_plat_driver = { .name = "mhi", .owner = THIS_MODULE, .of_match_table = mhi_plat_match, .pm = &pm_ops, }, }; Loading drivers/platform/msm/mhi/mhi_init.c +1 −1 Original line number Diff line number Diff line Loading @@ -587,7 +587,7 @@ error_during_props: */ int mhi_init_chan_ctxt(struct mhi_chan_ctxt *cc_list, uintptr_t trb_list_phy, uintptr_t trb_list_virt, u64 el_per_ring, enum MHI_CHAN_TYPE chan_type, u64 el_per_ring, enum MHI_CHAN_DIR chan_type, u32 event_ring, struct mhi_ring *ring, enum MHI_CHAN_STATE chan_state) { Loading drivers/platform/msm/mhi/mhi_macros.h +2 −11 Original line number Diff line number Diff line Loading @@ -41,20 +41,13 @@ #define MAX_XFER_WORK_ITEMS 100 #define MHI_MAX_SUPPORTED_DEVICES 1 #define MAX_NR_TRBS_PER_SOFT_CHAN 10 #define MAX_NR_TRBS_PER_HARD_CHAN (128 + 16) #define MHI_PCIE_VENDOR_ID 0x17CB #define MHI_PCIE_DEVICE_ID_9x35 0x0300 #define MHI_PCIE_DEVICE_ID_ZIRC 0x0301 #define MHI_PCIE_DEVICE_ID_9x55 0x0302 #define TRB_MAX_DATA_SIZE 0x1000 #define MHI_DATA_SEG_WINDOW_START_ADDR 0x0ULL #define MHI_DATA_SEG_WINDOW_END_ADDR 0x3E800000ULL #define MHI_M2_DEBOUNCE_TMR_MS 10 #define MHI_XFER_DB_INTERVAL 8 #define MHI_EV_DB_INTERVAL 1 #define MHI_DEV_WAKE_DB 127 Loading Loading @@ -97,14 +90,12 @@ #define IS_HW_EV_RING(_mhi_dev_ctxt, _EV_INDEX) (_EV_INDEX >= \ ((_mhi_dev_ctxt)->mmio_info.nr_event_rings - \ HW_EVENT_RINGS_ALLOCATED)) ((_mhi_dev_ctxt)->mmio_info.nr_hw_event_rings))) #define IS_SW_EV_RING(_mhi_dev_ctxt, _EV_INDEX) (_EV_INDEX < \ ((_mhi_dev_ctxt)->mmio_info.nr_event_rings - \ HW_EVENT_RINGS_ALLOCATED)) ((_mhi_dev_ctxt)->mmio_info.nr_hw_event_rings))) /* Debugging Capabilities*/ #define MHI_DBG_MAX_EVENT_HISTORY 10 /* MHI Transfer Ring Elements 7.4.1*/ #define TX_TRB_LEN Loading Loading
drivers/platform/msm/mhi/mhi.h +19 −6 Original line number Diff line number Diff line Loading @@ -66,13 +66,20 @@ struct bhi_ctxt_t { struct device *dev; }; enum MHI_CHAN_TYPE { enum MHI_CHAN_DIR { MHI_INVALID = 0x0, MHI_OUT = 0x1, MHI_IN = 0x2, MHI_CHAN_TYPE_reserved = 0x80000000 }; enum MHI_RING_CLASS { MHI_RING_INVALID = 0x0, MHI_HW_RING = 0x1, MHI_SW_RING = 0x2, MHI_RING_TYPE_reserved = 0x80000000 }; enum MHI_CHAN_STATE { MHI_CHAN_STATE_DISABLED = 0x0, MHI_CHAN_STATE_ENABLED = 0x1, Loading Loading @@ -130,7 +137,7 @@ struct __packed mhi_event_ctxt { struct __packed mhi_chan_ctxt { enum MHI_CHAN_STATE mhi_chan_state; enum MHI_CHAN_TYPE mhi_chan_type; enum MHI_CHAN_DIR mhi_chan_type; u32 mhi_event_ring_index; u64 mhi_trb_ring_base_addr; u64 mhi_trb_ring_len; Loading Loading @@ -262,7 +269,7 @@ struct mhi_ring { uintptr_t len; uintptr_t el_size; u32 overwrite_en; enum MHI_CHAN_TYPE dir; enum MHI_CHAN_DIR dir; }; enum MHI_CMD_STATUS { Loading Loading @@ -378,6 +385,7 @@ struct mhi_counters { u32 mhi_ready_cntr; u32 m3_event_timeouts; u32 m0_event_timeouts; u32 m2_event_timeouts; u32 msi_disable_cntr; u32 msi_enable_cntr; u32 nr_irq_migrations; Loading Loading @@ -424,6 +432,10 @@ struct dev_mmio_info { void __iomem *cmd_db_addr; u64 mmio_len; u32 nr_event_rings; u32 nr_hw_event_rings; u32 nr_sw_event_rings; u32 nr_sw_xfer_rings; u32 nr_hw_xfer_rings; dma_addr_t dma_ev_ctxt; /* Bus address of ECABAP*/ }; Loading Loading @@ -527,6 +539,7 @@ struct mhi_event_ring_cfg { u32 msi_vec; u32 intmod; u32 flags; enum MHI_RING_CLASS class; enum MHI_EVENT_RING_STATE state; irqreturn_t (*mhi_handler_ptr)(int , void *); }; Loading Loading @@ -562,7 +575,7 @@ int mhi_init_chan_ctxt(struct mhi_chan_ctxt *cc_list, uintptr_t trb_list_phy, uintptr_t trb_list_virt, u64 el_per_ring, enum MHI_CHAN_TYPE chan_type, enum MHI_CHAN_DIR chan_type, u32 event_ring, struct mhi_ring *ring, enum MHI_CHAN_STATE chan_state); Loading Loading @@ -596,8 +609,8 @@ enum MHI_STATUS mhi_init_state_transition(struct mhi_device_ctxt *mhi_dev_ctxt, enum STATE_TRANSITION new_state); enum MHI_STATUS mhi_wait_for_mdm(struct mhi_device_ctxt *mhi_dev_ctxt); enum hrtimer_restart mhi_initiate_m1(struct hrtimer *timer); int mhi_pci_suspend(struct pci_dev *dev, pm_message_t state); int mhi_pci_resume(struct pci_dev *dev); int mhi_pci_suspend(struct device *dev); int mhi_pci_resume(struct device *dev); int mhi_init_pcie_device(struct mhi_pcie_dev_info *mhi_pcie_dev); int mhi_init_pm_sysfs(struct device *dev); void mhi_rem_pm_sysfs(struct device *dev); Loading
drivers/platform/msm/mhi/mhi_event.c +9 −1 Original line number Diff line number Diff line /* Copyright (c) 2015, The Linux Foundation. All rights reserved. /* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -68,6 +68,14 @@ int mhi_populate_event_cfg(struct mhi_device_ctxt *mhi_dev_ctxt) else mhi_dev_ctxt->ev_ring_props[i].mhi_handler_ptr = mhi_msi_ipa_handlr; if (MHI_HW_RING == GET_EV_PROPS(EV_TYPE, mhi_dev_ctxt->ev_ring_props[i].flags)) { mhi_dev_ctxt->ev_ring_props[i].class = MHI_HW_RING; mhi_dev_ctxt->mmio_info.nr_sw_event_rings++; } else { mhi_dev_ctxt->ev_ring_props[i].class = MHI_SW_RING; mhi_dev_ctxt->mmio_info.nr_hw_event_rings++; } } dt_error: return r; Loading
drivers/platform/msm/mhi/mhi_iface.c +6 −6 Original line number Diff line number Diff line Loading @@ -208,17 +208,17 @@ msi_config_err: } static const struct dev_pm_ops pm_ops = { .runtime_suspend = mhi_runtime_suspend, .runtime_resume = mhi_runtime_resume, .runtime_idle = NULL, SET_RUNTIME_PM_OPS(mhi_runtime_suspend, mhi_runtime_resume, NULL) SET_SYSTEM_SLEEP_PM_OPS(mhi_pci_suspend, mhi_pci_resume) }; static struct pci_driver mhi_pcie_driver = { .name = "mhi_pcie_drv", .id_table = mhi_pcie_device_id, .probe = mhi_pci_probe, .suspend = mhi_pci_suspend, .resume = mhi_pci_resume, .driver = { .pm = &pm_ops } }; static int mhi_pci_probe(struct pci_dev *pcie_device, Loading @@ -239,6 +239,7 @@ static int mhi_pci_probe(struct pci_dev *pcie_device, mhi_devices.nr_of_devices++; plat_dev = mhi_devices.device_list[nr_dev].plat_dev; pcie_device->dev.of_node = plat_dev->dev.of_node; pm_runtime_put_noidle(&pcie_device->dev); mhi_pcie_dev->pcie_device = pcie_device; mhi_pcie_dev->mhi_pcie_driver = &mhi_pcie_driver; mhi_pcie_dev->mhi_pci_link_event.events = Loading Loading @@ -272,7 +273,6 @@ static struct platform_driver mhi_plat_driver = { .name = "mhi", .owner = THIS_MODULE, .of_match_table = mhi_plat_match, .pm = &pm_ops, }, }; Loading
drivers/platform/msm/mhi/mhi_init.c +1 −1 Original line number Diff line number Diff line Loading @@ -587,7 +587,7 @@ error_during_props: */ int mhi_init_chan_ctxt(struct mhi_chan_ctxt *cc_list, uintptr_t trb_list_phy, uintptr_t trb_list_virt, u64 el_per_ring, enum MHI_CHAN_TYPE chan_type, u64 el_per_ring, enum MHI_CHAN_DIR chan_type, u32 event_ring, struct mhi_ring *ring, enum MHI_CHAN_STATE chan_state) { Loading
drivers/platform/msm/mhi/mhi_macros.h +2 −11 Original line number Diff line number Diff line Loading @@ -41,20 +41,13 @@ #define MAX_XFER_WORK_ITEMS 100 #define MHI_MAX_SUPPORTED_DEVICES 1 #define MAX_NR_TRBS_PER_SOFT_CHAN 10 #define MAX_NR_TRBS_PER_HARD_CHAN (128 + 16) #define MHI_PCIE_VENDOR_ID 0x17CB #define MHI_PCIE_DEVICE_ID_9x35 0x0300 #define MHI_PCIE_DEVICE_ID_ZIRC 0x0301 #define MHI_PCIE_DEVICE_ID_9x55 0x0302 #define TRB_MAX_DATA_SIZE 0x1000 #define MHI_DATA_SEG_WINDOW_START_ADDR 0x0ULL #define MHI_DATA_SEG_WINDOW_END_ADDR 0x3E800000ULL #define MHI_M2_DEBOUNCE_TMR_MS 10 #define MHI_XFER_DB_INTERVAL 8 #define MHI_EV_DB_INTERVAL 1 #define MHI_DEV_WAKE_DB 127 Loading Loading @@ -97,14 +90,12 @@ #define IS_HW_EV_RING(_mhi_dev_ctxt, _EV_INDEX) (_EV_INDEX >= \ ((_mhi_dev_ctxt)->mmio_info.nr_event_rings - \ HW_EVENT_RINGS_ALLOCATED)) ((_mhi_dev_ctxt)->mmio_info.nr_hw_event_rings))) #define IS_SW_EV_RING(_mhi_dev_ctxt, _EV_INDEX) (_EV_INDEX < \ ((_mhi_dev_ctxt)->mmio_info.nr_event_rings - \ HW_EVENT_RINGS_ALLOCATED)) ((_mhi_dev_ctxt)->mmio_info.nr_hw_event_rings))) /* Debugging Capabilities*/ #define MHI_DBG_MAX_EVENT_HISTORY 10 /* MHI Transfer Ring Elements 7.4.1*/ #define TX_TRB_LEN Loading