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Commit ee3387f9 authored by Iain Paton's avatar Iain Paton Committed by Shawn Guo
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ARM: imx6: clk: i.MX6 DualLite/Solo i2c4 clock 



Compared to i.MX6 Quad/Dual the CCM_CCGR1 register in the i.MX6 Solo/DualLite
replaces the ecspi5 clock with the i2c4 clock.

Handle this difference using cpu_is_imx6dl().

Signed-off-by: default avatarIain Paton <ipaton0@gmail.com>
Signed-off-by: default avatarShawn Guo <shawn.guo@freescale.com>
parent 4fcad492

arch/arm/mach-imx/clk-imx6q.c

+5 −1
Original line number Original line Diff line number Diff line
@@ -352,6 +352,10 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) 
	clk[ecspi2]       = imx_clk_gate2("ecspi2",        "ecspi_root",        base + 0x6c, 2);

	clk[ecspi2]       = imx_clk_gate2("ecspi2",        "ecspi_root",        base + 0x6c, 2);

	clk[ecspi3]       = imx_clk_gate2("ecspi3",        "ecspi_root",        base + 0x6c, 4);

	clk[ecspi3]       = imx_clk_gate2("ecspi3",        "ecspi_root",        base + 0x6c, 4);

	clk[ecspi4]       = imx_clk_gate2("ecspi4",        "ecspi_root",        base + 0x6c, 6);

	clk[ecspi4]       = imx_clk_gate2("ecspi4",        "ecspi_root",        base + 0x6c, 6);

	if (cpu_is_imx6dl())

		/* ecspi5 is replaced with i2c4 on imx6dl & imx6s */

		clk[ecspi5] = imx_clk_gate2("i2c4",        "ipg_per",           base + 0x6c, 8);

	else

		clk[ecspi5] = imx_clk_gate2("ecspi5",      "ecspi_root",        base + 0x6c, 8);

		clk[ecspi5] = imx_clk_gate2("ecspi5",      "ecspi_root",        base + 0x6c, 8);

	clk[enet]         = imx_clk_gate2("enet",          "ipg",               base + 0x6c, 10);

	clk[enet]         = imx_clk_gate2("enet",          "ipg",               base + 0x6c, 10);

	clk[esai]         = imx_clk_gate2("esai",          "esai_podf",         base + 0x6c, 16);

	clk[esai]         = imx_clk_gate2("esai",          "esai_podf",         base + 0x6c, 16);