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Commit ee25df2b authored by Jesse Barnes's avatar Jesse Barnes Committed by Eric Anholt
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drm/i915: handle FBC and self-refresh better 



On 945, we need to avoid entering self-refresh if the compressor is
busy, or we may cause display FIFO underruns leading to ugly flicker.

Fixes fdo bug #24314, kernel bug #15043.

Tested-by: default avatarAlexander Lam <lambchop468@gmail.com>
Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Tested-by: Julien Cristau <jcristau@debian.org> (fd.o #25371)
Cc: stable@kernel.org
Signed-off-by: default avatarEric Anholt <eric@anholt.net>
parent fd2e8ea5

drivers/gpu/drm/i915/i915_reg.h

+1 −0
Original line number Diff line number Diff line
@@ -338,6 +338,7 @@ 
#define   FBC_CTL_PERIODIC	(1<<30)

#define   FBC_CTL_INTERVAL_SHIFT (16)

#define   FBC_CTL_UNCOMPRESSIBLE (1<<14)

#define   FBC_C3_IDLE		(1<<13)

#define   FBC_CTL_STRIDE_SHIFT	(5)

#define   FBC_CTL_FENCENO	(1<<0)

#define FBC_COMMAND		0x0320c

drivers/gpu/drm/i915/intel_display.c

+2 −0
Original line number Diff line number Diff line
@@ -1031,6 +1031,8 @@ static void i8xx_enable_fbc(struct drm_crtc *crtc, unsigned long interval) 


	/* enable it... */

	fbc_ctl = FBC_CTL_EN | FBC_CTL_PERIODIC;

	if (IS_I945GM(dev))

		fbc_ctl |= FBC_C3_IDLE; /* 945 needs special SR handling */

	fbc_ctl |= (dev_priv->cfb_pitch & 0xff) << FBC_CTL_STRIDE_SHIFT;

	fbc_ctl |= (interval & 0x2fff) << FBC_CTL_INTERVAL_SHIFT;

	if (obj_priv->tiling_mode != I915_TILING_NONE)