Merge "dwc3: gadget: Improve TX FIFO resize functionality"

  regulator node to the USB controller.

- qcom,dwc-usb3-msm-tx-fifo-size: If present, represents RAM size available for

		TX fifo allocation in bytes

- qcom,dwc-usb3-msm-qdss-tx-fifo-size: If present, represent RAM size available

		for TX fifo allocation in QDSS composition

- qcom,restore-sec-cfg-for-scm-dev-id: If present then device id value is

  passed to secure channel manager(scm) driver. scm driver uses this device

  id to restore USB controller related security configuration after coming

		qcom,dwc-usb3-msm-dbm-eps = <4>

		qcom,dwc_usb3-adc_tm = <&pm8941_adc_tm>;

		qcom,dwc-usb3-msm-tx-fifo-size = <29696>;

		qcom,dwc-usb3-msm-qdss-tx-fifo-size = <16384>;

		qcom,usb-dbm = <&dbm_1p4>;

		qcom,lpm-to-suspend-delay-ms = <2>;

		qcom,vbus-present;

	u8			lpm_nyet_thresh;

	atomic_t		in_lpm;

	int			tx_fifo_size;

	bool			tx_fifo_reduced;

	bool			b_suspend;

	/* IRQ timing statistics */

	unsigned int		current_max;

	unsigned int		health_status;

	unsigned int		tx_fifo_size;

	unsigned int		qdss_tx_fifo_size;

	bool			vbus_active;

	bool			ext_inuse;

	bool			rm_pulldown;

	return 0;

}

EXPORT_SYMBOL(msm_ep_unconfig);

void dwc3_tx_fifo_resize_request(struct usb_ep *ep, bool qdss_enabled)

{

	struct dwc3_ep *dep = to_dwc3_ep(ep);

	struct dwc3 *dwc = dep->dwc;

	struct dwc3_msm *mdwc = dev_get_drvdata(dwc->dev->parent);

	if (qdss_enabled) {

		dwc->tx_fifo_reduced = true;

		dwc->tx_fifo_size = mdwc->qdss_tx_fifo_size;

	} else {

		dwc->tx_fifo_reduced = false;

		dwc->tx_fifo_size = mdwc->tx_fifo_size;

	}

}

EXPORT_SYMBOL(dwc3_tx_fifo_resize_request);

static void dwc3_resume_work(struct work_struct *w);

static void dwc3_restart_usb_work(struct work_struct *w)

		dev_err(&pdev->dev,

			"unable to read platform data tx fifo size\n");

	if (of_property_read_u32(node, "qcom,dwc-usb3-msm-qdss-tx-fifo-size",

				 &mdwc->qdss_tx_fifo_size))

		dev_err(&pdev->dev,

			"unable to read platform data qdss tx fifo size\n");

	dwc3_set_notifier(&dwc3_msm_notify_event);

	/* Assumes dwc3 is the only DT child of dwc3-msm */

	int		mdwidth;

	int		num;

	int		num_eps;

	int		max_packet;

	struct usb_composite_dev *cdev = get_gadget_data(&dwc->gadget);

	if (!(cdev && cdev->config) || !dwc->needs_fifo_resize)

	/* MDWIDTH is represented in bits, we need it in bytes */

	mdwidth >>= 3;

	dev_dbg(dwc->dev, "%s: num eps: %d\n", __func__, num_eps);

	if (dwc->gadget.speed == USB_SPEED_FULL) {

		max_packet = 64;

	} else if (dwc->gadget.speed == USB_SPEED_HIGH) {

		max_packet = 512;

	} else if (dwc->gadget.speed == USB_SPEED_SUPER) {

		max_packet = 1024;

	} else {

		dev_warn(dwc->dev, "USB speed (%d) is not valid.\n",

						dwc->gadget.speed);

		return -EINVAL;

	}

	last_fifo_depth = (dwc3_readl(dwc->regs, DWC3_GTXFIFOSIZ(0)) & 0xFFFF);

	dev_dbg(dwc->dev, "%s: num eps:%d max_packet:%d last_fifo_depth:%04x\n",

				__func__, num_eps, max_packet, last_fifo_depth);

	for (num = 0; num < num_eps; num++) {

	/* Don't resize ep0IN TxFIFO, start with ep1IN only. */

	for (num = 1; num < num_eps; num++) {

		/* bit0 indicates direction; 1 means IN ep */

		struct dwc3_ep	*dep = dwc->eps[(num << 1) | 1];

		int		mult = 1;

		int		tmp;

		int		max_packet = 1024;

		if (!(dep->flags & DWC3_EP_ENABLED)) {

			dev_warn(dwc->dev, "ep%dIn not enabled", num);

				|| usb_endpoint_xfer_isoc(dep->endpoint.desc))

			mult = 3;

		/*

		 * REVISIT: the following assumes we will always have enough

		 * space available on the FIFO RAM for all possible use cases.

		 * Make sure that's true somehow and change FIFO allocation

		 * accordingly.

		 *

		 * If we have Bulk (burst only) or Isochronous endpoints, we

		 * want them to be able to be very, very fast. So we're giving

		 * those endpoints a fifo_size which is enough for 3 full

		 * packets

		 */

		tmp = mult * (dep->endpoint.maxpacket + mdwidth);

		if (dwc->tx_fifo_size &&

			(usb_endpoint_xfer_bulk(dep->endpoint.desc)

			|| usb_endpoint_xfer_isoc(dep->endpoint.desc))) {

			/*

			 * Allocate 3KB fifo size for bulk and isochronous TX

			 * endpoints irrespective of speed if tx_fifo is not

			 * reduced. Otherwise allocate 1KB for endpoints in HS

			 * mode and for non burst endpoints in SS mode. For

			 * interrupt ep, allocate fifo size of ep maxpacket.

			 */

			if (!dwc->tx_fifo_reduced)

				tmp = 3 * (1024 + mdwidth);

			else

				tmp = mult * (1024 + mdwidth);

		}

		tmp = mult * (max_packet + mdwidth);

resize_fifo:

		tmp += mdwidth;

		fifo_size |= (last_fifo_depth << 16);

		dev_vdbg(dwc->dev, "%s: Fifo Addr %04x Size %d\n",

		dev_dbg(dwc->dev, "%s: Fifo Addr %04x Size %d\n",

				dep->name, last_fifo_depth, fifo_size & 0xffff);

		last_fifo_depth += (fifo_size & 0xffff);

 *

 * Copyright (C) 2008 Google, Inc.

 * Author: Brian Swetland <swetland@google.com>

 * Copyright (c) 2009-2014, The Linux Foundation. All rights reserved.

 * Copyright (c) 2009-2015, The Linux Foundation. All rights reserved.

 *

 * This software is licensed under the terms of the GNU General Public

 * License version 2, as published by the Free Software Foundation, and

#ifdef CONFIG_USB_DWC3_MSM

int msm_ep_config(struct usb_ep *ep);

int msm_ep_unconfig(struct usb_ep *ep);

void dwc3_tx_fifo_resize_request(struct usb_ep *ep, bool qdss_enable);

int msm_data_fifo_config(struct usb_ep *ep, phys_addr_t addr, u32 size,

	u8 dst_pipe_idx);

bool msm_dwc3_reset_ep_after_lpm(struct usb_gadget *gadget);

	return -ENODEV;

}

static inline void dwc3_tx_fifo_resize_request(

					struct usb_ep *ep, bool qdss_enable)

{

	return;

}

static inline void msm_dwc3_restart_usb_session(struct usb_gadget *gadget)

{

	return;