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Commit ec58f1f3 authored by Magnus Damm's avatar Magnus Damm Committed by Paul Mundt
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sh: intc - add support for SH7706, SH7707, SH7708, SH7709



This patch unifies the cpu specific interrupt setup code for
sh7706, sh7707, sh7708 and sh7709 and moves the code into a new
file called setup-sh770x.c.  It makes sense to share the setup code
between these processors because most hardware blocks are identical
from a software point of view. With this patch the sh770x processors
now have a complete set of vectors that match with the information
provided by the data sheets. This is a big improvement for sh7708.

Vectors for IRQ4 and IRQ5 are enabled by default. Use
plat_irq_setup_pins() if pins IRQ0-3 should be used in IRQ mode.

This patch also unifies the platform device setup code which means
that the rtc driver now has platform data for all sh770x processors.

Signed-off-by: default avatarMagnus Damm <damm@igel.co.jp>
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent 28b146c8
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+4 −4
Original line number Diff line number Diff line
@@ -6,10 +6,10 @@ obj-y := ex.o probe.o entry.o

# CPU subtype setup
obj-$(CONFIG_CPU_SUBTYPE_SH7705)	+= setup-sh7705.o
obj-$(CONFIG_CPU_SUBTYPE_SH7706)	+= setup-sh7709.o
obj-$(CONFIG_CPU_SUBTYPE_SH7707)	+= setup-sh7709.o
obj-$(CONFIG_CPU_SUBTYPE_SH7708)	+= setup-sh7708.o
obj-$(CONFIG_CPU_SUBTYPE_SH7709)	+= setup-sh7709.o
obj-$(CONFIG_CPU_SUBTYPE_SH7706)	+= setup-sh770x.o
obj-$(CONFIG_CPU_SUBTYPE_SH7707)	+= setup-sh770x.o
obj-$(CONFIG_CPU_SUBTYPE_SH7708)	+= setup-sh770x.o
obj-$(CONFIG_CPU_SUBTYPE_SH7709)	+= setup-sh770x.o
obj-$(CONFIG_CPU_SUBTYPE_SH7710)	+= setup-sh7710.o
obj-$(CONFIG_CPU_SUBTYPE_SH7712)	+= setup-sh7710.o

+0 −43
Original line number Diff line number Diff line
/*
 * SH7708 Setup
 *
 *  Copyright (C) 2006  Paul Mundt
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 */
#include <linux/platform_device.h>
#include <linux/init.h>
#include <linux/serial.h>
#include <asm/sci.h>

static struct plat_sci_port sci_platform_data[] = {
	{
		.mapbase	= 0xfffffe80,
		.flags		= UPF_BOOT_AUTOCONF,
		.type		= PORT_SCI,
		.irqs		= { 23, 24, 25, 0 },
	}, {
		.flags = 0,
	}
};

static struct platform_device sci_device = {
	.name		= "sh-sci",
	.id		= -1,
	.dev		= {
		.platform_data	= sci_platform_data,
	},
};

static struct platform_device *sh7708_devices[] __initdata = {
	&sci_device,
};

static int __init sh7708_devices_setup(void)
{
	return platform_add_devices(sh7708_devices,
				    ARRAY_SIZE(sh7708_devices));
}
__initcall(sh7708_devices_setup);
+0 −145
Original line number Diff line number Diff line
/*
 * SH7707/SH7709 Setup
 *
 *  Copyright (C) 2006  Paul Mundt
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 */
#include <linux/platform_device.h>
#include <linux/init.h>
#include <linux/serial.h>
#include <asm/sci.h>

static struct resource rtc_resources[] = {
	[0] =	{
		.start	= 0xfffffec0,
		.end	= 0xfffffec0 + 0x1e,
		.flags  = IORESOURCE_IO,
	},
	[1] =	{
		.start  = 20,
		.flags	= IORESOURCE_IRQ,
	},
	[2] =	{
		.start	= 21,
		.flags	= IORESOURCE_IRQ,
	},
	[3] =	{
		.start	= 22,
		.flags  = IORESOURCE_IRQ,
	},
};

static struct plat_sci_port sci_platform_data[] = {
	{
		.mapbase	= 0xfffffe80,
		.flags		= UPF_BOOT_AUTOCONF,
		.type		= PORT_SCI,
		.irqs		= { 23, 24, 25, 0 },
	}, {
		.mapbase	= 0xa4000150,
		.flags		= UPF_BOOT_AUTOCONF,
		.type		= PORT_SCIF,
		.irqs		= { 56, 57, 59, 58 },
	}, {
		.mapbase	= 0xa4000140,
		.flags		= UPF_BOOT_AUTOCONF,
		.type		= PORT_IRDA,
		.irqs		= { 52, 53, 55, 54 },
	}, {
		.flags = 0,
	}
};

static struct platform_device sci_device = {
	.name		= "sh-sci",
	.id		= -1,
	.dev		= {
		.platform_data	= sci_platform_data,
	},
};

static struct platform_device rtc_device = {
	.name		= "sh-rtc",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(rtc_resources),
	.resource	= rtc_resources,
};

static struct platform_device *sh7709_devices[] __initdata = {
	&sci_device,
	&rtc_device,
};

static int __init sh7709_devices_setup(void)
{
	return platform_add_devices(sh7709_devices,
		ARRAY_SIZE(sh7709_devices));
}
__initcall(sh7709_devices_setup);

static struct ipr_data ipr_irq_table[] = {
	{ 16, 0, 12, 2 }, /* TMU TUNI0 */
	{ 17, 0, 8,  4 }, /* TMU TUNI1 */
	{ 18, 0, 4,  1 }, /* TMU TUNI1 */
	{ 19, 0, 4,  1 }, /* TMU TUNI1 */
	{ 20, 0, 0,  2 }, /* RTC CUI */
	{ 21, 0, 0,  2 }, /* RTC CUI */
	{ 22, 0, 0,  2 }, /* RTC CUI */

	{ 23, 1, 4,  3 }, /* SCI */
	{ 24, 1, 4,  3 }, /* SCI */
	{ 25, 1, 4,  3 }, /* SCI */
	{ 26, 1, 4,  3 }, /* SCI */
	{ 27, 1, 12, 3 }, /* WDT ITI */

	{ 32, 2, 0,  1 }, /* IRQ 0 */
	{ 33, 2, 4,  1 }, /* IRQ 1 */
	{ 34, 2, 8,  1 }, /* IRQ 2 APM */
	{ 35, 2, 12, 1 }, /* IRQ 3 TOUCHSCREEN */

	{ 36, 3, 0,  1 }, /* IRQ 4 */
	{ 37, 3, 4,  1 }, /* IRQ 5 */

	{ 48, 4, 12, 7 }, /* DMA */
	{ 49, 4, 12, 7 }, /* DMA */
	{ 50, 4, 12, 7 }, /* DMA */
	{ 51, 4, 12, 7 }, /* DMA */

	{ 52, 4, 8,  3 }, /* IRDA */
	{ 53, 4, 8,  3 }, /* IRDA */
	{ 54, 4, 8,  3 }, /* IRDA */
	{ 55, 4, 8,  3 }, /* IRDA */

	{ 56, 4, 4,  3 }, /* SCIF */
	{ 57, 4, 4,  3 }, /* SCIF */
	{ 58, 4, 4,  3 }, /* SCIF */
	{ 59, 4, 4,  3 }, /* SCIF */
};

static unsigned long ipr_offsets[] = {
	0xfffffee2,	/* 0: IPRA */
	0xfffffee4,	/* 1: IPRB */
	0xa4000016,	/* 2: IPRC */
	0xa4000018,	/* 3: IPRD */
	0xa400001a,	/* 4: IPRE */
};

static struct ipr_desc ipr_irq_desc = {
	.ipr_offsets	= ipr_offsets,
	.nr_offsets	= ARRAY_SIZE(ipr_offsets),

	.ipr_data	= ipr_irq_table,
	.nr_irqs	= ARRAY_SIZE(ipr_irq_table),

	.chip = {
		.name	= "IPR-sh7709",
	},
};

void __init plat_irq_setup(void)
{
	register_ipr_controller(&ipr_irq_desc);
}
+212 −0
Original line number Diff line number Diff line
/*
 * SH3 Setup code for SH7706, SH7707, SH7708, SH7709
 *
 *  Copyright (C) 2007  Magnus Damm
 *
 * Based on setup-sh7709.c
 *
 *  Copyright (C) 2006  Paul Mundt
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 */
#include <linux/init.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/platform_device.h>
#include <linux/serial.h>
#include <asm/sci.h>

enum {
	UNUSED = 0,

	/* interrupt sources */
	IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
	PINT07, PINT815,
	DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3,
	SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI,
	SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI,
	SCI_ERI, SCI_RXI, SCI_TXI, SCI_TEI,
	ADC_ADI,
	TMU0, TMU1, TMU2_TUNI, TMU2_TICPI,
	RTC_ATI, RTC_PRI, RTC_CUI,
	WDT,
	REF_RCMI, REF_ROVI,

	/* interrupt groups */
	RTC, REF, TMU2, DMAC, SCI, SCIF2, SCIF0,
};

static struct intc_vect vectors[] = {
	INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
	INTC_VECT(TMU2_TUNI, 0x440), INTC_VECT(TMU2_TICPI, 0x460),
	INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0),
	INTC_VECT(RTC_CUI, 0x4c0),
	INTC_VECT(SCI_ERI, 0x4e0), INTC_VECT(SCI_RXI, 0x500),
	INTC_VECT(SCI_TXI, 0x520), INTC_VECT(SCI_TEI, 0x540),
	INTC_VECT(WDT, 0x560),
	INTC_VECT(REF_RCMI, 0x580),
	INTC_VECT(REF_ROVI, 0x5a0),
#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
    defined(CONFIG_CPU_SUBTYPE_SH7707) || \
    defined(CONFIG_CPU_SUBTYPE_SH7709)
	INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
	INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820),
	INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860),
	INTC_VECT(ADC_ADI, 0x980),
	INTC_VECT(SCIF2_ERI, 0x900), INTC_VECT(SCIF2_RXI, 0x920),
	INTC_VECT(SCIF2_BRI, 0x940), INTC_VECT(SCIF2_TXI, 0x960),
#endif
#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
    defined(CONFIG_CPU_SUBTYPE_SH7709)
	INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720),
	INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0),
	INTC_VECT(SCIF0_BRI, 0x8c0), INTC_VECT(SCIF0_TXI, 0x8e0),
#endif
};

static struct intc_group groups[] = {
	INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),
	INTC_GROUP(TMU2, TMU2_TUNI, TMU2_TICPI),
	INTC_GROUP(REF, REF_RCMI, REF_ROVI),
	INTC_GROUP(DMAC, DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3),
	INTC_GROUP(SCI, SCI_ERI, SCI_RXI, SCI_TXI, SCI_TEI),
	INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
	INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI),
};

static struct intc_prio priorities[] = {
	INTC_PRIO(DMAC, 7),
	INTC_PRIO(SCI, 3),
	INTC_PRIO(SCIF2, 3),
	INTC_PRIO(SCIF0, 3),
};

static struct intc_prio_reg prio_registers[] = {
	{ 0xfffffee2, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
	{ 0xfffffee4, 16, 4, /* IPRB */ { WDT, REF, SCI, 0 } },
#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
    defined(CONFIG_CPU_SUBTYPE_SH7707) || \
    defined(CONFIG_CPU_SUBTYPE_SH7709)
	{ 0xa4000016, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
	{ 0xa4000018, 16, 4, /* IPRD */ { 0, 0, IRQ4, IRQ5 } },
	{ 0xa400001a, 16, 4, /* IPRE */ { DMAC, 0, SCIF2, ADC_ADI } },
#endif
#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
    defined(CONFIG_CPU_SUBTYPE_SH7709)
	{ 0xa4000018, 16, 4, /* IPRD */ { PINT07, PINT815, } },
	{ 0xa400001a, 16, 4, /* IPRE */ { 0, SCIF0 } },
#endif
};

static DECLARE_INTC_DESC(intc_desc, "sh770x", vectors, groups,
			 priorities, NULL, prio_registers, NULL);

#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
    defined(CONFIG_CPU_SUBTYPE_SH7707) || \
    defined(CONFIG_CPU_SUBTYPE_SH7709)
static struct intc_vect vectors_irq[] = {
	INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
	INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
};

static DECLARE_INTC_DESC(intc_desc_irq, "sh770x-irq", vectors_irq, NULL,
			 priorities, NULL, prio_registers, NULL);
#endif

static struct resource rtc_resources[] = {
	[0] =	{
		.start	= 0xfffffec0,
		.end	= 0xfffffec0 + 0x1e,
		.flags  = IORESOURCE_IO,
	},
	[1] =	{
		.start  = 20,
		.flags	= IORESOURCE_IRQ,
	},
	[2] =	{
		.start	= 21,
		.flags	= IORESOURCE_IRQ,
	},
	[3] =	{
		.start	= 22,
		.flags  = IORESOURCE_IRQ,
	},
};

static struct platform_device rtc_device = {
	.name		= "sh-rtc",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(rtc_resources),
	.resource	= rtc_resources,
};

static struct plat_sci_port sci_platform_data[] = {
	{
		.mapbase	= 0xfffffe80,
		.flags		= UPF_BOOT_AUTOCONF,
		.type		= PORT_SCI,
		.irqs		= { 23, 24, 25, 0 },
	},
#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
    defined(CONFIG_CPU_SUBTYPE_SH7707) || \
    defined(CONFIG_CPU_SUBTYPE_SH7709)
	{
		.mapbase	= 0xa4000150,
		.flags		= UPF_BOOT_AUTOCONF,
		.type		= PORT_SCIF,
		.irqs		= { 56, 57, 59, 58 },
	},
#endif
#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
    defined(CONFIG_CPU_SUBTYPE_SH7709)
	{
		.mapbase	= 0xa4000140,
		.flags		= UPF_BOOT_AUTOCONF,
		.type		= PORT_IRDA,
		.irqs		= { 52, 53, 55, 54 },
	},
#endif
	{
		.flags = 0,
	}
};

static struct platform_device sci_device = {
	.name		= "sh-sci",
	.id		= -1,
	.dev		= {
		.platform_data	= sci_platform_data,
	},
};

static struct platform_device *sh770x_devices[] __initdata = {
	&sci_device,
	&rtc_device,
};

static int __init sh770x_devices_setup(void)
{
	return platform_add_devices(sh770x_devices,
		ARRAY_SIZE(sh770x_devices));
}
__initcall(sh770x_devices_setup);

void __init plat_irq_setup_pins(int mode)
{
	if (mode == IRQ_MODE_IRQ) {
#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
    defined(CONFIG_CPU_SUBTYPE_SH7707) || \
    defined(CONFIG_CPU_SUBTYPE_SH7709)
		register_intc_controller(&intc_desc_irq);
		return;
#endif
	}
	BUG();
}

void __init plat_irq_setup(void)
{
	register_intc_controller(&intc_desc);
}
+4 −2
Original line number Diff line number Diff line
@@ -71,19 +71,21 @@ config CPU_SUBTYPE_SH7705
config CPU_SUBTYPE_SH7706
	bool "Support SH7706 processor"
	select CPU_SH3
	select CPU_HAS_IPR_IRQ
	select CPU_HAS_INTC_IRQ
	help
	  Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU.

config CPU_SUBTYPE_SH7707
	bool "Support SH7707 processor"
	select CPU_SH3
	select CPU_HAS_INTC_IRQ
	help
	  Select SH7707 if you have a  60 Mhz SH-3 HD6417707 CPU.

config CPU_SUBTYPE_SH7708
	bool "Support SH7708 processor"
	select CPU_SH3
	select CPU_HAS_INTC_IRQ
	help
	  Select SH7708 if you have a  60 Mhz SH-3 HD6417708S or
	  if you have a 100 Mhz SH-3 HD6417708R CPU.
@@ -91,7 +93,7 @@ config CPU_SUBTYPE_SH7708
config CPU_SUBTYPE_SH7709
	bool "Support SH7709 processor"
	select CPU_SH3
	select CPU_HAS_IPR_IRQ
	select CPU_HAS_INTC_IRQ
	help
	  Select SH7709 if you have a  80 Mhz SH-3 HD6417709 CPU.