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Commit eb9d158f authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Use SE/CMOS clock for QUSB2 PHY on sdxhedgehog"

parents 2619f6a4 5296bec3

arch/arm/boot/dts/qcom/sdxhedgehog-usb.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -128,7 +128,7 @@ 
		qcom,vdd-voltage-level = <0 928000 928000>;

		qcom,qusb-phy-init-seq =

			/* <value reg_offset> */

				<0x13 0x04 /* analog_controls_two */

				<0x03 0x04 /* analog_controls_two */

				0x7c 0x18c /* pll_clock_inverter */

				0x80 0x2c /* pll_cmode */

				0x0a 0x184 /* pll_lock_delay */

drivers/usb/phy/phy-msm-qusb-v2.c

+10 −1
Original line number Diff line number Diff line
@@ -51,6 +51,7 @@ 
#define DPSE_INTERRUPT			BIT(0)



#define QUSB2PHY_PORT_TUNE1		0x23c

#define QUSB2PHY_TEST1			0x24C



#define QUSB2PHY_1P8_VOL_MIN           1800000 /* uV */

#define QUSB2PHY_1P8_VOL_MAX           1800000 /* uV */
@@ -578,13 +579,21 @@ static int qusb_phy_set_suspend(struct usb_phy *phy, int suspend) 
				readl_relaxed(qphy->base +

					QUSB2PHY_PLL_ANALOG_CONTROLS_TWO);



			writel_relaxed(0x1b,

			writel_relaxed(0x0b,

				qphy->base + QUSB2PHY_PLL_ANALOG_CONTROLS_TWO);



			/* enable clock bypass */

			writel_relaxed(0x90,

				qphy->base + QUSB2PHY_PLL_ANALOG_CONTROLS_ONE);



			/* Enable auto-resume */

			writel_relaxed(0x91,

				qphy->base + QUSB2PHY_TEST1);



			/* arm auto-resume */

			writel_relaxed(0x90,

				qphy->base + QUSB2PHY_TEST1);



			/* Disable all interrupts */

			writel_relaxed(0x00,

				qphy->base + QUSB2PHY_INTR_CTRL);