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Commit ea68c00e authored by John Ogness's avatar John Ogness Committed by Paul Walmsley
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OMAP2/3: clock: fix fint calculation for DPLL_FREQSEL 



In OMAP35X TRM Rev 2010-05 Figure 7-18 "DPLL With EMI Reduction
Feature", it is shown that the internal frequency is calculated by
CLK_IN/(N+1). However, the value passed to _dpll_test_fint() is
already "N+1" since Linux is using the values to divide by. In the
technical reference manual, "N" is referring to the divider's register
value (0-127).

During power management testing, it was observed that programming the
wrong jitter correction value can cause the system to become unstable
and eventually crash.

Signed-off-by: default avatarJohn Ogness <john.ogness@linutronix.de>
[paul@pwsan.com: added second paragraph to commit message]
Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
parent f5412be5

arch/arm/mach-omap2/clkt_dpll.c

+1 −1
Original line number Diff line number Diff line
@@ -77,7 +77,7 @@ static int _dpll_test_fint(struct clk *clk, u8 n) 
	dd = clk->dpll_data;



	/* DPLL divider must result in a valid jitter correction val */

	fint = clk->parent->rate / (n + 1);

	fint = clk->parent->rate / n;

	if (fint < DPLL_FINT_BAND1_MIN) {



		pr_debug("rejecting n=%d due to Fint failure, "