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Commit e9806a3d authored by Andrei Danaila's avatar Andrei Danaila Committed by Matt Wagantall
Browse files

mhi: core: Enable MHI for 64bit. Necessary Changes 



Change-Id: I9ac7df3a6ecffaf78e23232ead005fba9eadc9c1

Signed-off-by: default avatarAndrei Danaila <adanaila@codeaurora.org>
parent 368c4096

drivers/platform/msm/mhi/mhi.h

+1 −1
Original line number Diff line number Diff line
@@ -22,7 +22,7 @@ 
#include <linux/spinlock.h>

#include <linux/sched.h>

#include <linux/cdev.h>

#include <mach/msm_pcie.h>

#include <linux/msm_pcie.h>

#include <linux/sched.h>



extern struct mhi_pcie_devices mhi_devices;

drivers/platform/msm/mhi/mhi_bhi.c

+3 −3
Original line number Diff line number Diff line
@@ -50,7 +50,7 @@ static ssize_t bhi_write(struct file *file, 
	wait_event_interruptible(*mhi_dev_ctxt->mhi_ev_wq.bhi_event,

			mhi_dev_ctxt->mhi_state == MHI_STATE_BHI);



	mhi_log(MHI_MSG_INFO, "Entered. User Image size 0x%x\n", count);

	mhi_log(MHI_MSG_INFO, "Entered. User Image size 0x%zx\n", count);



	bhi_ctxt->unaligned_image_loc = kmalloc(count + (align_len - 1),

						GFP_KERNEL);
@@ -185,7 +185,7 @@ int bhi_probe(struct mhi_pcie_dev_info *mhi_pcie_device) 
		mhi_log(MHI_MSG_CRITICAL,

			"Failed to instantiate class %d\n",

			ret_val);

		r = (int)bhi_ctxt->bhi_class;

		r = PTR_RET(bhi_ctxt->bhi_class);

		goto err_class_create;

	}

	cdev_init(&bhi_ctxt->cdev, &bhi_fops);
@@ -197,7 +197,7 @@ int bhi_probe(struct mhi_pcie_dev_info *mhi_pcie_device) 
	if (IS_ERR(bhi_ctxt->dev)) {

		mhi_log(MHI_MSG_CRITICAL,

				"Failed to add bhi cdev\n");

		r = (int)bhi_ctxt->dev;

		r = PTR_RET(bhi_ctxt->dev);

		goto err_dev_create;

	}

	return 0;

drivers/platform/msm/mhi/mhi_iface.c

+1 −0
Original line number Diff line number Diff line
@@ -19,6 +19,7 @@ 
#include <linux/delay.h>

#include <linux/debugfs.h>

#include <linux/pm_runtime.h>

#include <linux/interrupt.h>



#define CREATE_TRACE_POINTS

#include "mhi_trace.h"

drivers/platform/msm/mhi/mhi_init.c

+4 −4
Original line number Diff line number Diff line
@@ -215,8 +215,7 @@ static enum MHI_STATUS mhi_init_device_ctrl(struct mhi_device_ctxt 
	/* Calculate the size of the control segment needed */



	ctrl_seg_size += align_len - (ctrl_seg_size % align_len);



	ret_val = mhi_mallocmemregion(mhi_dev_ctxt->mhi_ctrl_seg_info,

	ret_val = mhi_mallocmemregion(mhi_dev_ctxt, mhi_dev_ctxt->mhi_ctrl_seg_info,

							ctrl_seg_size);

	if (MHI_STATUS_SUCCESS != ret_val)

		return MHI_STATUS_ERROR;
@@ -309,12 +308,12 @@ static enum MHI_STATUS mhi_spawn_threads(struct mhi_device_ctxt *mhi_dev_ctxt) 
	mhi_dev_ctxt->event_thread_handle = kthread_run(parse_event_thread,

							mhi_dev_ctxt,

							"mhi_ev_thrd");

	if (-ENOMEM == (int)mhi_dev_ctxt->event_thread_handle)

	if (IS_ERR(mhi_dev_ctxt->event_thread_handle))

		return MHI_STATUS_ERROR;

	mhi_dev_ctxt->st_thread_handle = kthread_run(mhi_state_change_thread,

							mhi_dev_ctxt,

							"mhi_st_thrd");

	if (-ENOMEM == (int)mhi_dev_ctxt->event_thread_handle)

	if (IS_ERR(mhi_dev_ctxt->event_thread_handle))

		return MHI_STATUS_ERROR;

	return MHI_STATUS_SUCCESS;

}
@@ -334,6 +333,7 @@ enum MHI_STATUS mhi_init_device_ctxt(struct mhi_pcie_dev_info *dev_info, 
		struct mhi_device_ctxt *mhi_dev_ctxt)

{

	int r = 0;



	if (NULL == dev_info || NULL == mhi_dev_ctxt)

		return MHI_STATUS_ERROR;

	mhi_log(MHI_MSG_VERBOSE, "mhi_init_device_ctxt>Init MHI dev ctxt\n");

drivers/platform/msm/mhi/mhi_main.c

+2 −10
Original line number Diff line number Diff line
@@ -84,10 +84,6 @@ int mhi_init_pcie_device(struct mhi_pcie_dev_info *mhi_pcie_dev) 
		ioremap_nocache(pci_resource_start(pcie_device, 0),

			pci_resource_len(pcie_device, 0));

	if (!mhi_pcie_dev->core.bar0_base) {

		mhi_log(MHI_MSG_ERROR,

			"Failed to map bar 0 addr 0x%x len 0x%x.\n",

			pci_resource_start(pcie_device, 0),

			pci_resource_len(pcie_device, 0));

		goto mhi_device_list_error;

	}
@@ -97,10 +93,6 @@ int mhi_init_pcie_device(struct mhi_pcie_dev_info *mhi_pcie_dev) 
		ioremap_nocache(pci_resource_start(pcie_device, 2),

			pci_resource_len(pcie_device, 2));

	if (!mhi_pcie_dev->core.bar2_base) {

		mhi_log(MHI_MSG_ERROR,

			"Failed to map bar 2 addr 0x%x len 0x%x.\n",

			pci_resource_start(pcie_device, 2),

			pci_resource_len(pcie_device, 2));

		goto io_map_err;

	}
@@ -149,7 +141,7 @@ static void mhi_move_interrupts(struct mhi_device_ctxt *mhi_dev_ctxt, u32 cpu) 
int mhi_cpu_notifier_cb(struct notifier_block *nfb, unsigned long action,

			void *hcpu)

{

	u32 cpu = (u32)hcpu;

	uintptr_t cpu = (uintptr_t)hcpu;

	struct mhi_device_ctxt *mhi_dev_ctxt = container_of(nfb,

						struct mhi_device_ctxt,

						mhi_cpu_notifier);
@@ -596,7 +588,7 @@ enum MHI_STATUS mhi_queue_xfer(struct mhi_client_handle *client_handle, 
	wmb();



	mhi_log(MHI_MSG_VERBOSE,

		"Channel %d Has buf size of %d and buf addr %lx, flags 0x%x\n",

		"Channel %d Has buf size of %zd and buf addr %lx, flags 0x%x\n",

				chan, buf_len, (uintptr_t)buf, mhi_flags);



	/* Add the TRB to the correct transfer ring */