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Commit e954a204 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm-nouveau-next' of... 

Merge branch 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-next

- first stage of (ongoing) gpu fault recovery work
- initial support for maxwell (binary driver fw needed)
- various random fixes across the board

* 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6: (87 commits)
  drm/nouveau: fix missing newline
  drm/nouveau/bios: fetch the vbios from PROM using only aligned 32-bit accesses
  drm/nouveau/therm: let the vbios decide on the automatic fan management mode
  drm/nvd7/therm: handle another kind of PWM fans
  drm/nouveau/pm/fan: drop the fan lock in fan_update() before rescheduling
  drm/nouveau: fix small thinko in vblank timestamping.
  drm/nouveau/therm: check for sensor presence with requested mode, not current
  drm/nouveau/disp/dp: allow 540MHz data rate
  drm/nouveau: recognise higher link rate for available dp bw calculations
  drm/nouveau/disp: limit dp capabilities as per dcb
  drm/nva3/fbram: restrict training pattern setup to GT218
  drm/nva3/devinit: restrict script access to some PFB regs
  drm/nouveau/devinit: add interface to check if a mmio access by scripts is ok
  drm/nouveau/bios: have strap reads show on devinit spam debug level
  drm/nv50/gpio: fixup reset for gpios >= 16
  drm/nv50/gpio: exclude sense value from mask when changing registers
  drm/gk104/gr: therm magic needed on some kepler boards
  drm/gm107/gr: initial support
  drm/gf100-/gf: fix a stupid typo, waiting on wrong signal for mmctx
  drm/nouveau/bios: parsing of some random table needed to bring up gr
  ...
parents 23c73b24 40189b0c

drivers/gpu/drm/nouveau/Makefile

+13 −3
Original line number Original line Diff line number Diff line
@@ -48,6 +48,7 @@ nouveau-y += core/subdev/bios/therm.o 
nouveau-y += core/subdev/bios/vmap.o

nouveau-y += core/subdev/bios/vmap.o

nouveau-y += core/subdev/bios/volt.o

nouveau-y += core/subdev/bios/volt.o

nouveau-y += core/subdev/bios/xpio.o

nouveau-y += core/subdev/bios/xpio.o

nouveau-y += core/subdev/bios/P0260.o

nouveau-y += core/subdev/bus/hwsq.o

nouveau-y += core/subdev/bus/hwsq.o

nouveau-y += core/subdev/bus/nv04.o

nouveau-y += core/subdev/bus/nv04.o

nouveau-y += core/subdev/bus/nv31.o

nouveau-y += core/subdev/bus/nv31.o
@@ -77,6 +78,7 @@ nouveau-y += core/subdev/devinit/nv98.o 
nouveau-y += core/subdev/devinit/nva3.o

nouveau-y += core/subdev/devinit/nva3.o

nouveau-y += core/subdev/devinit/nvaf.o

nouveau-y += core/subdev/devinit/nvaf.o

nouveau-y += core/subdev/devinit/nvc0.o

nouveau-y += core/subdev/devinit/nvc0.o

nouveau-y += core/subdev/devinit/gm107.o

nouveau-y += core/subdev/fb/base.o

nouveau-y += core/subdev/fb/base.o

nouveau-y += core/subdev/fb/nv04.o

nouveau-y += core/subdev/fb/nv04.o

nouveau-y += core/subdev/fb/nv10.o

nouveau-y += core/subdev/fb/nv10.o
@@ -100,6 +102,7 @@ nouveau-y += core/subdev/fb/nvaa.o 
nouveau-y += core/subdev/fb/nvaf.o

nouveau-y += core/subdev/fb/nvaf.o

nouveau-y += core/subdev/fb/nvc0.o

nouveau-y += core/subdev/fb/nvc0.o

nouveau-y += core/subdev/fb/nve0.o

nouveau-y += core/subdev/fb/nve0.o

nouveau-y += core/subdev/fb/gm107.o

nouveau-y += core/subdev/fb/ramnv04.o

nouveau-y += core/subdev/fb/ramnv04.o

nouveau-y += core/subdev/fb/ramnv10.o

nouveau-y += core/subdev/fb/ramnv10.o

nouveau-y += core/subdev/fb/ramnv1a.o

nouveau-y += core/subdev/fb/ramnv1a.o
@@ -114,6 +117,7 @@ nouveau-y += core/subdev/fb/ramnva3.o 
nouveau-y += core/subdev/fb/ramnvaa.o

nouveau-y += core/subdev/fb/ramnvaa.o

nouveau-y += core/subdev/fb/ramnvc0.o

nouveau-y += core/subdev/fb/ramnvc0.o

nouveau-y += core/subdev/fb/ramnve0.o

nouveau-y += core/subdev/fb/ramnve0.o

nouveau-y += core/subdev/fb/ramgm107.o

nouveau-y += core/subdev/fb/sddr3.o

nouveau-y += core/subdev/fb/sddr3.o

nouveau-y += core/subdev/fb/gddr5.o

nouveau-y += core/subdev/fb/gddr5.o

nouveau-y += core/subdev/gpio/base.o

nouveau-y += core/subdev/gpio/base.o
@@ -136,7 +140,8 @@ nouveau-y += core/subdev/instmem/base.o 
nouveau-y += core/subdev/instmem/nv04.o

nouveau-y += core/subdev/instmem/nv04.o

nouveau-y += core/subdev/instmem/nv40.o

nouveau-y += core/subdev/instmem/nv40.o

nouveau-y += core/subdev/instmem/nv50.o

nouveau-y += core/subdev/instmem/nv50.o

nouveau-y += core/subdev/ltcg/nvc0.o

nouveau-y += core/subdev/ltcg/gf100.o

nouveau-y += core/subdev/ltcg/gm107.o

nouveau-y += core/subdev/mc/base.o

nouveau-y += core/subdev/mc/base.o

nouveau-y += core/subdev/mc/nv04.o

nouveau-y += core/subdev/mc/nv04.o

nouveau-y += core/subdev/mc/nv40.o

nouveau-y += core/subdev/mc/nv40.o
@@ -170,6 +175,7 @@ nouveau-y += core/subdev/therm/nva3.o 
nouveau-y += core/subdev/therm/nvd0.o

nouveau-y += core/subdev/therm/nvd0.o

nouveau-y += core/subdev/timer/base.o

nouveau-y += core/subdev/timer/base.o

nouveau-y += core/subdev/timer/nv04.o

nouveau-y += core/subdev/timer/nv04.o

nouveau-y += core/subdev/timer/gk20a.o

nouveau-y += core/subdev/vm/base.o

nouveau-y += core/subdev/vm/base.o

nouveau-y += core/subdev/vm/nv04.o

nouveau-y += core/subdev/vm/nv04.o

nouveau-y += core/subdev/vm/nv41.o

nouveau-y += core/subdev/vm/nv41.o
@@ -206,6 +212,7 @@ nouveau-y += core/engine/device/nv40.o 
nouveau-y += core/engine/device/nv50.o

nouveau-y += core/engine/device/nv50.o

nouveau-y += core/engine/device/nvc0.o

nouveau-y += core/engine/device/nvc0.o

nouveau-y += core/engine/device/nve0.o

nouveau-y += core/engine/device/nve0.o

nouveau-y += core/engine/device/gm100.o

nouveau-y += core/engine/disp/base.o

nouveau-y += core/engine/disp/base.o

nouveau-y += core/engine/disp/nv04.o

nouveau-y += core/engine/disp/nv04.o

nouveau-y += core/engine/disp/nv50.o

nouveau-y += core/engine/disp/nv50.o
@@ -216,6 +223,7 @@ nouveau-y += core/engine/disp/nva3.o 
nouveau-y += core/engine/disp/nvd0.o

nouveau-y += core/engine/disp/nvd0.o

nouveau-y += core/engine/disp/nve0.o

nouveau-y += core/engine/disp/nve0.o

nouveau-y += core/engine/disp/nvf0.o

nouveau-y += core/engine/disp/nvf0.o

nouveau-y += core/engine/disp/gm107.o

nouveau-y += core/engine/disp/dacnv50.o

nouveau-y += core/engine/disp/dacnv50.o

nouveau-y += core/engine/disp/dport.o

nouveau-y += core/engine/disp/dport.o

nouveau-y += core/engine/disp/hdanva3.o

nouveau-y += core/engine/disp/hdanva3.o
@@ -242,13 +250,14 @@ nouveau-y += core/engine/graph/ctxnv40.o 
nouveau-y += core/engine/graph/ctxnv50.o

nouveau-y += core/engine/graph/ctxnv50.o

nouveau-y += core/engine/graph/ctxnvc0.o

nouveau-y += core/engine/graph/ctxnvc0.o

nouveau-y += core/engine/graph/ctxnvc1.o

nouveau-y += core/engine/graph/ctxnvc1.o

nouveau-y += core/engine/graph/ctxnvc3.o

nouveau-y += core/engine/graph/ctxnvc4.o

nouveau-y += core/engine/graph/ctxnvc8.o

nouveau-y += core/engine/graph/ctxnvc8.o

nouveau-y += core/engine/graph/ctxnvd7.o

nouveau-y += core/engine/graph/ctxnvd7.o

nouveau-y += core/engine/graph/ctxnvd9.o

nouveau-y += core/engine/graph/ctxnvd9.o

nouveau-y += core/engine/graph/ctxnve4.o

nouveau-y += core/engine/graph/ctxnve4.o

nouveau-y += core/engine/graph/ctxnvf0.o

nouveau-y += core/engine/graph/ctxnvf0.o

nouveau-y += core/engine/graph/ctxnv108.o

nouveau-y += core/engine/graph/ctxnv108.o

nouveau-y += core/engine/graph/ctxgm107.o

nouveau-y += core/engine/graph/nv04.o

nouveau-y += core/engine/graph/nv04.o

nouveau-y += core/engine/graph/nv10.o

nouveau-y += core/engine/graph/nv10.o

nouveau-y += core/engine/graph/nv20.o

nouveau-y += core/engine/graph/nv20.o
@@ -261,13 +270,14 @@ nouveau-y += core/engine/graph/nv40.o 
nouveau-y += core/engine/graph/nv50.o

nouveau-y += core/engine/graph/nv50.o

nouveau-y += core/engine/graph/nvc0.o

nouveau-y += core/engine/graph/nvc0.o

nouveau-y += core/engine/graph/nvc1.o

nouveau-y += core/engine/graph/nvc1.o

nouveau-y += core/engine/graph/nvc3.o

nouveau-y += core/engine/graph/nvc4.o

nouveau-y += core/engine/graph/nvc8.o

nouveau-y += core/engine/graph/nvc8.o

nouveau-y += core/engine/graph/nvd7.o

nouveau-y += core/engine/graph/nvd7.o

nouveau-y += core/engine/graph/nvd9.o

nouveau-y += core/engine/graph/nvd9.o

nouveau-y += core/engine/graph/nve4.o

nouveau-y += core/engine/graph/nve4.o

nouveau-y += core/engine/graph/nvf0.o

nouveau-y += core/engine/graph/nvf0.o

nouveau-y += core/engine/graph/nv108.o

nouveau-y += core/engine/graph/nv108.o

nouveau-y += core/engine/graph/gm107.o

nouveau-y += core/engine/mpeg/nv31.o

nouveau-y += core/engine/mpeg/nv31.o

nouveau-y += core/engine/mpeg/nv40.o

nouveau-y += core/engine/mpeg/nv40.o

nouveau-y += core/engine/mpeg/nv44.o

nouveau-y += core/engine/mpeg/nv44.o

drivers/gpu/drm/nouveau/core/core/namedb.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -167,7 +167,7 @@ int 
nouveau_namedb_create_(struct nouveau_object *parent,

nouveau_namedb_create_(struct nouveau_object *parent,

		       struct nouveau_object *engine,

		       struct nouveau_object *engine,

		       struct nouveau_oclass *oclass, u32 pclass,

		       struct nouveau_oclass *oclass, u32 pclass,

		       struct nouveau_oclass *sclass, u32 engcls,

		       struct nouveau_oclass *sclass, u64 engcls,

		       int length, void **pobject)

		       int length, void **pobject)

{

{

	struct nouveau_namedb *namedb;

	struct nouveau_namedb *namedb;

drivers/gpu/drm/nouveau/core/core/parent.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -49,7 +49,7 @@ nouveau_parent_sclass(struct nouveau_object *parent, u16 handle, 




	mask = nv_parent(parent)->engine;

	mask = nv_parent(parent)->engine;

	while (mask) {

	while (mask) {

		int i = ffsll(mask) - 1;

		int i = __ffs64(mask);





		if (nv_iclass(parent, NV_CLIENT_CLASS))

		if (nv_iclass(parent, NV_CLIENT_CLASS))

			engine = nv_engine(nv_client(parent)->device);

			engine = nv_engine(nv_client(parent)->device);

drivers/gpu/drm/nouveau/core/engine/device/base.c

+80 −5
Original line number Original line Diff line number Diff line
@@ -131,8 +131,8 @@ nouveau_devobj_ctor(struct nouveau_object *parent, 
	if (ret)

	if (ret)

		return ret;

		return ret;





	mmio_base = pci_resource_start(device->pdev, 0);

	mmio_base = nv_device_resource_start(device, 0);

	mmio_size = pci_resource_len(device->pdev, 0);

	mmio_size = nv_device_resource_len(device, 0);





	/* translate api disable mask into internal mapping */

	/* translate api disable mask into internal mapping */

	disable = args->debug0;

	disable = args->debug0;
@@ -185,6 +185,7 @@ nouveau_devobj_ctor(struct nouveau_object *parent, 
			case 0x0e0:

			case 0x0e0:

			case 0x0f0:

			case 0x0f0:

			case 0x100: device->card_type = NV_E0; break;

			case 0x100: device->card_type = NV_E0; break;

			case 0x110: device->card_type = GM100; break;

			default:

			default:

				break;

				break;

			}

			}
@@ -208,6 +209,7 @@ nouveau_devobj_ctor(struct nouveau_object *parent, 
		case NV_C0:

		case NV_C0:

		case NV_D0: ret = nvc0_identify(device); break;

		case NV_D0: ret = nvc0_identify(device); break;

		case NV_E0: ret = nve0_identify(device); break;

		case NV_E0: ret = nve0_identify(device); break;

		case GM100: ret = gm100_identify(device); break;

		default:

		default:

			ret = -EINVAL;

			ret = -EINVAL;

			break;

			break;
@@ -446,6 +448,72 @@ nouveau_device_dtor(struct nouveau_object *object) 
	nouveau_engine_destroy(&device->base);

	nouveau_engine_destroy(&device->base);

}

}





resource_size_t

nv_device_resource_start(struct nouveau_device *device, unsigned int bar)

{

	if (nv_device_is_pci(device)) {

		return pci_resource_start(device->pdev, bar);

	} else {

		struct resource *res;

		res = platform_get_resource(device->platformdev,

					    IORESOURCE_MEM, bar);

		if (!res)

			return 0;

		return res->start;

	}

}



resource_size_t

nv_device_resource_len(struct nouveau_device *device, unsigned int bar)

{

	if (nv_device_is_pci(device)) {

		return pci_resource_len(device->pdev, bar);

	} else {

		struct resource *res;

		res = platform_get_resource(device->platformdev,

					    IORESOURCE_MEM, bar);

		if (!res)

			return 0;

		return resource_size(res);

	}

}



dma_addr_t

nv_device_map_page(struct nouveau_device *device, struct page *page)

{

	dma_addr_t ret;



	if (nv_device_is_pci(device)) {

		ret = pci_map_page(device->pdev, page, 0, PAGE_SIZE,

				   PCI_DMA_BIDIRECTIONAL);

		if (pci_dma_mapping_error(device->pdev, ret))

			ret = 0;

	} else {

		ret = page_to_phys(page);

	}



	return ret;

}



void

nv_device_unmap_page(struct nouveau_device *device, dma_addr_t addr)

{

	if (nv_device_is_pci(device))

		pci_unmap_page(device->pdev, addr, PAGE_SIZE,

			       PCI_DMA_BIDIRECTIONAL);

}



int

nv_device_get_irq(struct nouveau_device *device, bool stall)

{

	if (nv_device_is_pci(device)) {

		return device->pdev->irq;

	} else {

		return platform_get_irq_byname(device->platformdev,

					       stall ? "stall" : "nonstall");

	}

}



static struct nouveau_oclass

static struct nouveau_oclass

nouveau_device_oclass = {

nouveau_device_oclass = {

	.handle = NV_ENGINE(DEVICE, 0x00),

	.handle = NV_ENGINE(DEVICE, 0x00),
@@ -457,8 +525,8 @@ nouveau_device_oclass = { 
};

};





int

int

nouveau_device_create_(struct pci_dev *pdev, u64 name, const char *sname,

nouveau_device_create_(void *dev, enum nv_bus_type type, u64 name,

		       const char *cfg, const char *dbg,

		       const char *sname, const char *cfg, const char *dbg,

		       int length, void **pobject)

		       int length, void **pobject)

{

{

	struct nouveau_device *device;

	struct nouveau_device *device;
@@ -476,7 +544,14 @@ nouveau_device_create_(struct pci_dev *pdev, u64 name, const char *sname, 
	if (ret)

	if (ret)

		goto done;

		goto done;





	device->pdev = pdev;

	switch (type) {

	case NOUVEAU_BUS_PCI:

		device->pdev = dev;

		break;

	case NOUVEAU_BUS_PLATFORM:

		device->platformdev = dev;

		break;

	}

	device->handle = name;

	device->handle = name;

	device->cfgopt = cfg;

	device->cfgopt = cfg;

	device->dbgopt = dbg;

	device->dbgopt = dbg;

drivers/gpu/drm/nouveau/core/engine/device/gm100.c

0 → 100644
+106 −0
Original line number Original line Diff line number Diff line 
/*

 * Copyright 2012 Red Hat Inc.

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the "Software"),

 * to deal in the Software without restriction, including without limitation

 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

 * and/or sell copies of the Software, and to permit persons to whom the

 * Software is furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice shall be included in

 * all copies or substantial portions of the Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL

 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR

 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,

 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

 * OTHER DEALINGS IN THE SOFTWARE.

 *

 * Authors: Ben Skeggs

 */



#include <subdev/bios.h>

#include <subdev/bus.h>

#include <subdev/gpio.h>

#include <subdev/i2c.h>

#include <subdev/clock.h>

#include <subdev/therm.h>

#include <subdev/mxm.h>

#include <subdev/devinit.h>

#include <subdev/mc.h>

#include <subdev/timer.h>

#include <subdev/fb.h>

#include <subdev/ltcg.h>

#include <subdev/ibus.h>

#include <subdev/instmem.h>

#include <subdev/vm.h>

#include <subdev/bar.h>

#include <subdev/pwr.h>

#include <subdev/volt.h>



#include <engine/device.h>

#include <engine/dmaobj.h>

#include <engine/fifo.h>

#include <engine/software.h>

#include <engine/graph.h>

#include <engine/disp.h>

#include <engine/copy.h>

#include <engine/bsp.h>

#include <engine/vp.h>

#include <engine/ppp.h>

#include <engine/perfmon.h>



int

gm100_identify(struct nouveau_device *device)

{

	switch (device->chipset) {

	case 0x117:

		device->cname = "GM107";

		device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;

		device->oclass[NVDEV_SUBDEV_GPIO   ] = &nve0_gpio_oclass;

		device->oclass[NVDEV_SUBDEV_I2C    ] = &nvd0_i2c_oclass;

		device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nve0_clock_oclass;

#if 0

		device->oclass[NVDEV_SUBDEV_THERM  ] = &nvd0_therm_oclass;

#endif

		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  gm107_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nvc3_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &gk20a_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  gm107_fb_oclass;

		device->oclass[NVDEV_SUBDEV_LTCG   ] =  gm107_ltcg_oclass;

		device->oclass[NVDEV_SUBDEV_IBUS   ] = &nve0_ibus_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nvc0_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_BAR    ] = &nvc0_bar_oclass;

#if 0

		device->oclass[NVDEV_SUBDEV_PWR    ] = &nv108_pwr_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

#endif

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvd0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv108_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  gm107_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  gm107_disp_oclass;

		device->oclass[NVDEV_ENGINE_COPY0  ] = &nve0_copy0_oclass;

#if 0

		device->oclass[NVDEV_ENGINE_COPY1  ] = &nve0_copy1_oclass;

#endif

		device->oclass[NVDEV_ENGINE_COPY2  ] = &nve0_copy2_oclass;

#if 0

		device->oclass[NVDEV_ENGINE_BSP    ] = &nve0_bsp_oclass;

		device->oclass[NVDEV_ENGINE_VP     ] = &nve0_vp_oclass;

		device->oclass[NVDEV_ENGINE_PPP    ] = &nvc0_ppp_oclass;

#endif

		break;

	default:

		nv_fatal(device, "unknown Maxwell chipset\n");

		return -EINVAL;

	}



	return 0;

}