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Commit e94129e1 authored by Sudheer Papothi's avatar Sudheer Papothi
Browse files

soundwire: Add slave synchronization configuration 



Slave synchronization is needed to sync frame shape consisting
of different ports with different sample rates. Change sets
the slave synchronization based on the frame shape.

Change-Id: Iae726555b3c158394662c590d1ebc781ff7f54f5
Signed-off-by: default avatarSudheer Papothi <spapothi@codeaurora.org>
parent e5fd6614

drivers/soundwire/swr-wcd-ctrl.c

+11 −6
Original line number Diff line number Diff line
@@ -616,7 +616,8 @@ static void swrm_apply_port_config(struct swr_master *master) 
	int len = 0;



	int mask = (SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_BMSK |

		SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_BMSK);

		    SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_BMSK |

		    SWRM_MCP_FRAME_CTRL_BANK_SSP_PERIOD_BMSK);



	if (!swrm) {

		pr_err("%s: Invalid handle to swr controller\n",
@@ -632,7 +633,8 @@ static void swrm_apply_port_config(struct swr_master *master) 
	value = swrm->read(swrm->handle, SWRM_MCP_FRAME_CTRL_BANK_ADDR(bank));

	value &= (~mask);

	value |= ((0 << SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_SHFT) |

		(7 << SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_SHFT));

		  (7 << SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_SHFT) |

		  (0 << SWRM_MCP_FRAME_CTRL_BANK_SSP_PERIOD_SHFT));

	swrm->write(swrm->handle, SWRM_MCP_FRAME_CTRL_BANK_ADDR(bank), value);

	dev_dbg(swrm->dev, "%s: regaddr: 0x%x, value: 0x%x\n", __func__,

		SWRM_MCP_FRAME_CTRL_BANK_ADDR(bank), value);
@@ -1038,6 +1040,7 @@ static int swrm_master_init(struct swr_mstr_ctrl *swrm) 
	u32 val;

	u8 row_ctrl = SWR_MAX_ROW;

	u8 col_ctrl = SWR_MIN_COL;

	u8 ssp_period = 1;

	u8 retry_cmd_num = 3;

	u32 reg[SWRM_MAX_INIT_REG];

	u32 value[SWRM_MAX_INIT_REG];
@@ -1045,7 +1048,8 @@ static int swrm_master_init(struct swr_mstr_ctrl *swrm) 


	/* Clear Rows and Cols */

	val = ((row_ctrl << SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_SHFT) |

		(col_ctrl << SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_SHFT));

		(col_ctrl << SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_SHFT) |

		(ssp_period << SWRM_MCP_FRAME_CTRL_BANK_SSP_PERIOD_SHFT));



	reg[len] = SWRM_MCP_FRAME_CTRL_BANK_ADDR(0);

	value[len++] = val;
@@ -1074,11 +1078,12 @@ static int swrm_master_init(struct swr_mstr_ctrl *swrm) 
	reg[len] = SWRM_COMP_CFG_ADDR;

	value[len++] = 0x02;



	reg[len] = SWRM_MCP_BUS_CTRL_ADDR;

	value[len++] = 0x02;



	reg[len] = SWRM_COMP_CFG_ADDR;

	value[len++] = 0x03;



	reg[len] = SWRM_INTERRUPT_CLEAR;

	value[len++] = 0x08;



	swrm->bulk_write(swrm->handle, reg, value, len);



	return ret;

drivers/soundwire/swrm_registers.h

+5 −1
Original line number Diff line number Diff line
@@ -136,8 +136,12 @@ 
#define SWRM_ENUMERATOR_SLAVE_DEV_ID_2(m)   (SWRM_BASE_ADDRESS+0x534+0x8*m)



#define SWRM_MCP_FRAME_CTRL_BANK_ADDR(m)    (SWRM_BASE_ADDRESS+0x101C+0x40*m)

#define SWRM_MCP_FRAME_CTRL_BANK_RMSK			0x000007ff

#define SWRM_MCP_FRAME_CTRL_BANK_RMSK			0x00ff07ff

#define SWRM_MCP_FRAME_CTRL_BANK_SHFT			0

#define SWRM_MCP_FRAME_CTRL_BANK_SSP_PERIOD_BMSK	0xff0000

#define SWRM_MCP_FRAME_CTRL_BANK_SSP_PERIOD_SHFT	16

#define SWRM_MCP_FRAME_CTRL_BANK_PHASE_BMSK		0xf800

#define SWRM_MCP_FRAME_CTRL_BANK_PHASE_SHFT		11

#define SWRM_MCP_FRAME_CTRL_BANK_CLK_DIV_VALUE_BMSK	0x700

#define SWRM_MCP_FRAME_CTRL_BANK_CLK_DIV_VALUE_SHFT	8

#define SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_BMSK		0xF8