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Commit e9069cf8 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'vt8500/pinctrl' of git://server.prisktech.co.nz/git/linuxwmt into next/drivers 

From Tony Prisk <linux@prisktech.co.nz>:

arm: vt8500: Add pinctrl driver for arch-vt8500

This series adds support for the pinctrl/gpio module on all arch-vt8500
supported SoCs.

As part of the review process, some tidy up is also done to
drivers/of/base.c to remove some code that is being constantly duplicated.

Also, a patch for the bcm2835 pinctrl driver is included to take advantage
of the new of/base.c code.

* tag 'vt8500/pinctrl' of git://server.prisktech.co.nz/git/linuxwmt

: (606 commits)
  pinctrl: bcm2835: make use of of_property_read_u32_index()
  gpio: vt8500: Remove arch-vt8500 gpio driver
  arm: vt8500: Remove gpio devicetree nodes
  arm: dts: vt8500: Update Wondermedia SoC dtsi files for pinctrl driver
  pinctrl: gpio: vt8500: Add pincontrol driver for arch-vt8500
  arm: vt8500: Increase available GPIOs on arch-vt8500
  of: Remove duplicated code for validating property and value
  of: Add support for reading a u32 from a multi-value property.

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 4680ebc2 ce63d6d4

CREDITS

+8 −0
Original line number Diff line number Diff line
@@ -1510,6 +1510,14 @@ D: Natsemi ethernet 
D: Cobalt Networks (x86) support

D: This-and-That



N: Mark M. Hoffman

E: mhoffman@lightlink.com

D: asb100, lm93 and smsc47b397 hardware monitoring drivers

D: hwmon subsystem core

D: hwmon subsystem maintainer

D: i2c-sis96x and i2c-stub SMBus drivers

S: USA



N: Dirk Hohndel

E: hohndel@suse.de

D: The XFree86[tm] Project

Documentation/devicetree/bindings/gpio/gpio-vt8500.txt

deleted100644 → 0
+0 −24
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VIA/Wondermedia VT8500 GPIO Controller

-----------------------------------------------------



Required properties:

- compatible : "via,vt8500-gpio", "wm,wm8505-gpio"

	or "wm,wm8650-gpio" depending on your SoC

- reg : Should contain 1 register range (address and length)

- #gpio-cells : should be <3>.

	1) bank

	2) pin number

	3) flags - should be 0



Example:



	gpio: gpio-controller@d8110000 {

		compatible = "via,vt8500-gpio";

		gpio-controller;

		reg = <0xd8110000 0x10000>;

		#gpio-cells = <3>;

	};



	vibrate {

		gpios = <&gpio 0 1 0>; /* Bank 0, Pin 1, No flags */

	};

Documentation/devicetree/bindings/mfd/ab8500.txt

+1 −5
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@@ -13,9 +13,6 @@ Required parent device properties: 
                                  4 = active high level-sensitive

                                  8 = active low level-sensitive



Optional parent device properties:

- reg                    : contains the PRCMU mailbox address for the AB8500 i2c port



The AB8500 consists of a large and varied group of sub-devices:



Device                     IRQ Names              Supply Names   Description
@@ -86,9 +83,8 @@ Non-standard child device properties: 
   - stericsson,amic2-bias-vamic1           : Analoge Mic wishes to use a non-standard Vamic

   - stericsson,earpeice-cmv                : Earpeice voltage (only: 950 | 1100 | 1270 | 1580)



ab8500@5 {

ab8500 {

         compatible = "stericsson,ab8500";

         reg = <5>; /* mailbox 5 is i2c */

         interrupts = <0 40 0x4>;

         interrupt-controller;

         #interrupt-cells = <2>;

Documentation/devicetree/bindings/pinctrl/pinctrl-vt8500.txt

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VIA VT8500 and Wondermedia WM8xxx-series pinmux/gpio controller



These SoCs contain a combined Pinmux/GPIO module. Each pin may operate as

either a GPIO in, GPIO out or as an alternate function (I2C, SPI etc).



Required properties:

- compatible: "via,vt8500-pinctrl", "wm,wm8505-pinctrl", "wm,wm8650-pinctrl",

	"wm8750-pinctrl" or "wm,wm8850-pinctrl"

- reg: Should contain the physical address of the module's registers.

- interrupt-controller: Marks the device node as an interrupt controller.

- #interrupt-cells: Should be two.

- gpio-controller: Marks the device node as a GPIO controller.

- #gpio-cells : Should be two. The first cell is the pin number and the

  second cell is used to specify optional parameters.

	bit 0 - active low



Please refer to ../gpio/gpio.txt for a general description of GPIO bindings.



Please refer to pinctrl-bindings.txt in this directory for details of the

common pinctrl bindings used by client devices, including the meaning of the

phrase "pin configuration node".



Each pin configuration node lists the pin(s) to which it applies, and one or

more of the mux functions to select on those pin(s), and pull-up/down

configuration. Each subnode only affects those parameters that are explicitly

listed. In other words, a subnode that lists only a mux function implies no

information about any pull configuration. Similarly, a subnode that lists only

a pull parameter implies no information about the mux function.



Required subnode-properties:

- wm,pins: An array of cells. Each cell contains the ID of a pin.



Optional subnode-properties:

- wm,function: Integer, containing the function to mux to the pin(s):

  0: GPIO in

  1: GPIO out

  2: alternate



- wm,pull: Integer, representing the pull-down/up to apply to the pin(s):

  0: none

  1: down

  2: up



Each of wm,function and wm,pull may contain either a single value which

will be applied to all pins in wm,pins, or one value for each entry in

wm,pins.



Example:



	pinctrl: pinctrl {

		compatible = "wm,wm8505-pinctrl";

		reg = <0xD8110000 0x10000>;

		interrupt-controller;

		#interrupt-cells = <2>;

		gpio-controller;

		#gpio-cells = <2>;

	};

Documentation/devicetree/bindings/tty/serial/of-serial.txt

+3 −0
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@@ -11,6 +11,9 @@ Required properties: 
	- "nvidia,tegra20-uart"

	- "nxp,lpc3220-uart"

	- "ibm,qpace-nwp-serial"

	- "altr,16550-FIFO32"

	- "altr,16550-FIFO64"

	- "altr,16550-FIFO128"

	- "serial" if the port type is unknown.

- reg : offset and length of the register set for the device.

- interrupts : should contain uart interrupt.