Loading drivers/media/platform/msm/camera_v2/sensor/csiphy/include/msm_csiphy_3_4_2_hwreg.h +2 −1 Original line number Diff line number Diff line Loading @@ -88,6 +88,7 @@ struct csiphy_reg_3ph_parms_t csiphy_v3_4_2_3ph = { {0x3C, 0xB8}, {0x1C, 0xE7}, {0x14, 0x0}, {0x14, 0x60} {0x14, 0x60}, {0x700, 0x80} }; #endif drivers/media/platform/msm/camera_v2/sensor/csiphy/include/msm_csiphy_3_5_hwreg.h +2 −1 Original line number Diff line number Diff line Loading @@ -76,7 +76,7 @@ struct csiphy_reg_3ph_parms_t csiphy_v3_5_3ph = { {0x854, 0xFF}, {0x28, 0x0}, {0x800, 0x0}, {0x0, 0xCF}, {0x0, 0xD7}, {0x4, 0x8}, {0x8, 0x0}, {0xC, 0xA5}, Loading @@ -89,5 +89,6 @@ struct csiphy_reg_3ph_parms_t csiphy_v3_5_3ph = { {0x1C, 0xA}, {0x14, 0x0}, {0x0, 0x0}, {0x700, 0xC0}, }; #endif drivers/media/platform/msm/camera_v2/sensor/csiphy/msm_csiphy.c +5 −6 Original line number Diff line number Diff line Loading @@ -366,12 +366,11 @@ static int msm_csiphy_2phase_lane_config( mipi_csiphy_2ph_lnn_cfg3.addr + offset); if (clk_lane == 1) { if (csiphy_dev->hw_version == CSIPHY_VERSION_V342) { msm_camera_io_w(0x80, csiphybase + msm_camera_io_w(csiphy_dev->ctrl_reg->csiphy_3ph_reg. mipi_csiphy_3ph_lnck_cfg1.data, csiphybase + csiphy_dev->ctrl_reg->csiphy_3ph_reg. mipi_csiphy_2ph_lnn_cfg1.addr + offset); } mipi_csiphy_3ph_lnck_cfg1.addr); msm_camera_io_w(csiphy_dev->ctrl_reg->csiphy_3ph_reg. mipi_csiphy_2ph_lnn_cfg4.data, csiphybase + csiphy_dev->ctrl_reg->csiphy_3ph_reg. Loading drivers/media/platform/msm/camera_v2/sensor/csiphy/msm_csiphy.h +1 −0 Original line number Diff line number Diff line Loading @@ -123,6 +123,7 @@ struct csiphy_reg_3ph_parms_t { struct csiphy_reg_t mipi_csiphy_2ph_lnn_test_imp; struct csiphy_reg_t mipi_csiphy_2ph_lnn_test_force; struct csiphy_reg_t mipi_csiphy_2ph_lnn_ctrl5; struct csiphy_reg_t mipi_csiphy_3ph_lnck_cfg1; }; struct csiphy_ctrl_t { Loading Loading
drivers/media/platform/msm/camera_v2/sensor/csiphy/include/msm_csiphy_3_4_2_hwreg.h +2 −1 Original line number Diff line number Diff line Loading @@ -88,6 +88,7 @@ struct csiphy_reg_3ph_parms_t csiphy_v3_4_2_3ph = { {0x3C, 0xB8}, {0x1C, 0xE7}, {0x14, 0x0}, {0x14, 0x60} {0x14, 0x60}, {0x700, 0x80} }; #endif
drivers/media/platform/msm/camera_v2/sensor/csiphy/include/msm_csiphy_3_5_hwreg.h +2 −1 Original line number Diff line number Diff line Loading @@ -76,7 +76,7 @@ struct csiphy_reg_3ph_parms_t csiphy_v3_5_3ph = { {0x854, 0xFF}, {0x28, 0x0}, {0x800, 0x0}, {0x0, 0xCF}, {0x0, 0xD7}, {0x4, 0x8}, {0x8, 0x0}, {0xC, 0xA5}, Loading @@ -89,5 +89,6 @@ struct csiphy_reg_3ph_parms_t csiphy_v3_5_3ph = { {0x1C, 0xA}, {0x14, 0x0}, {0x0, 0x0}, {0x700, 0xC0}, }; #endif
drivers/media/platform/msm/camera_v2/sensor/csiphy/msm_csiphy.c +5 −6 Original line number Diff line number Diff line Loading @@ -366,12 +366,11 @@ static int msm_csiphy_2phase_lane_config( mipi_csiphy_2ph_lnn_cfg3.addr + offset); if (clk_lane == 1) { if (csiphy_dev->hw_version == CSIPHY_VERSION_V342) { msm_camera_io_w(0x80, csiphybase + msm_camera_io_w(csiphy_dev->ctrl_reg->csiphy_3ph_reg. mipi_csiphy_3ph_lnck_cfg1.data, csiphybase + csiphy_dev->ctrl_reg->csiphy_3ph_reg. mipi_csiphy_2ph_lnn_cfg1.addr + offset); } mipi_csiphy_3ph_lnck_cfg1.addr); msm_camera_io_w(csiphy_dev->ctrl_reg->csiphy_3ph_reg. mipi_csiphy_2ph_lnn_cfg4.data, csiphybase + csiphy_dev->ctrl_reg->csiphy_3ph_reg. Loading
drivers/media/platform/msm/camera_v2/sensor/csiphy/msm_csiphy.h +1 −0 Original line number Diff line number Diff line Loading @@ -123,6 +123,7 @@ struct csiphy_reg_3ph_parms_t { struct csiphy_reg_t mipi_csiphy_2ph_lnn_test_imp; struct csiphy_reg_t mipi_csiphy_2ph_lnn_test_force; struct csiphy_reg_t mipi_csiphy_2ph_lnn_ctrl5; struct csiphy_reg_t mipi_csiphy_3ph_lnck_cfg1; }; struct csiphy_ctrl_t { Loading