Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit e8637aed authored by Rohit Gupta's avatar Rohit Gupta
Browse files

ARM: dts: msm: Update minbw table for MSM8996 to improve performance 



This update ensures that there is no performance degradation due to the
bus/DDR running slow when there is at least a single threaded workload
that's keeps the CPU completely busy but has sporadic low bandwidth memory
access due to infrequent cache misses.

Change-Id: Ib0302eb5c2d9a1d6d7e6827ceed5cc67ef5070ec
Signed-off-by: default avatarRohit Gupta <rohgup@codeaurora.org>
parent 2096745b

arch/arm/boot/dts/qcom/msm8996.dtsi

+26 −0
Original line number Diff line number Diff line
@@ -638,6 +638,23 @@ 
		qcom,target-dev = <&cpubw>;

	};



	mincpubw: qcom,mincpubw {

		compatible = "qcom,devbw";

		governor = "powersave";

		qcom,src-dst-ports = <1 512>;

		qcom,active-only;

		qcom,bw-tbl =

			<   762 /*  100 MHz */ >,

			<  1144 /*  150 MHz */ >,

			<  1525 /*  200 MHz */ >,

			<  2288 /*  300 MHz */ >,

			<  5195 /*  681 MHz */ >,

			<  5859 /*  768 MHz */ >,

			<  7759 /* 1017 MHz */ >,

			< 11863 /* 1555 MHz */ >,

			< 13763 /* 1804 MHz */ >;

	};



	devfreq_cpufreq: devfreq-cpufreq {

		cpubw-cpufreq {

			target-dev = <&cpubw>;
@@ -670,6 +687,15 @@ 
				<  960000  960000 >,

				< 1593600 1036000 >;

		};



		mincpubw-cpufreq {

			target-dev = <&mincpubw>;

			cpu-to-dev-map-0 =

				< 1420800 1525 >;

			cpu-to-dev-map-2 =

				< 1420800 1525 >,

				< 1593600 5195 >;

		};

	};



	msm_cpufreq: qcom,msm-cpufreq {