Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit e7c8f380 authored by Andrew Lunn's avatar Andrew Lunn Committed by Jason Cooper
Browse files

ARM: kirkwood: Convert mv88f6281gtw_ge switch setup to DT



The mv88f6281gtw_ge has a ethernet switch connected to the ethernet
port of the SoC. Convert the platform device instantiation to a DT
instantiation.

Signed-off-by: default avatarAndrew Lunn <andrew@lunn.ch>
Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
Tested-by: default avatarJason Gunthorpe <jgunthorpe@obsidianresearch.com>
Cc: florian@openwrt.org
Signed-off-by: default avatarJason Cooper <jason@lakedaemon.net>
parent c3b6144a
Loading
Loading
Loading
Loading
+62 −0
Original line number Diff line number Diff line
@@ -122,4 +122,66 @@
			gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
		};
	};

	dsa@0 {
		compatible = "marvell,dsa";
		#address-cells = <2>;
		#size-cells = <0>;

		dsa,ethernet = <&eth0>;
		dsa,mii-bus = <&ethphy0>;

		switch@0 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0 0>;	/* MDIO address 0, switch 0 in tree */

			port@0 {
				reg = <0>;
				label = "lan1";
			};

			port@1 {
				reg = <1>;
				label = "lan2";
			};

			port@2 {
				reg = <2>;
				label = "lan3";
			};

			port@3 {
				reg = <3>;
				label = "lan4";
			};

			port@4 {
				reg = <4>;
				label = "wan";
			};

			port@5 {
				reg = <5>;
				label = "cpu";
			};
		};
	};
};

&mdio {
	status = "okay";

	ethphy0: ethernet-phy@ff {
		reg = <0xff>; 	/* No phy attached */
		speed = <1000>;
		duplex = <1>;
	};
};

&eth0 {
	status = "okay";
	ethernet0-port@0 {
		phy-handle = <&ethphy0>;
	};
};
+0 −7
Original line number Diff line number Diff line
@@ -106,13 +106,6 @@ config ARCH_KIRKWOOD_DT
	  Say 'Y' here if you want your kernel to support the
	  Marvell Kirkwood using flattened device tree.

config MACH_MV88F6281GTW_GE_DT
	bool "Marvell 88F6281 GTW GE Board (Flattened Device Tree)"
	depends on ARCH_KIRKWOOD_DT
	help
	  Say 'Y' here if you want your kernel to support the
	  Marvell 88F6281 GTW GE Board (Flattened Device Tree).

endmenu

endif
+0 −1
Original line number Diff line number Diff line
@@ -13,4 +13,3 @@ obj-$(CONFIG_MACH_TS219) += ts219-setup.o tsx1x-common.o
obj-$(CONFIG_MACH_TS41X)		+= ts41x-setup.o tsx1x-common.o

obj-$(CONFIG_ARCH_KIRKWOOD_DT)		+= board-dt.o
obj-$(CONFIG_MACH_MV88F6281GTW_GE_DT)	+= board-mv88f6281gtw_ge.o
+0 −3
Original line number Diff line number Diff line
@@ -131,9 +131,6 @@ static void __init kirkwood_dt_init(void)
	kexec_reinit = kirkwood_enable_pcie;
#endif

	if (of_machine_is_compatible("marvell,mv88f6281gtw-ge"))
		mv88f6281gtw_ge_init();

	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}

+0 −50
Original line number Diff line number Diff line
/*
 * arch/arm/mach-kirkwood/board-mv88f6281gtw_ge.c
 *
 * Marvell 88F6281 GTW GE Board Setup
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/irq.h>
#include <linux/timer.h>
#include <linux/mv643xx_eth.h>
#include <linux/ethtool.h>
#include <linux/gpio.h>
#include <net/dsa.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/pci.h>
#include <mach/kirkwood.h>
#include "common.h"

static struct mv643xx_eth_platform_data mv88f6281gtw_ge_ge00_data = {
	.phy_addr	= MV643XX_ETH_PHY_NONE,
	.speed		= SPEED_1000,
	.duplex		= DUPLEX_FULL,
};

static struct dsa_chip_data mv88f6281gtw_ge_switch_chip_data = {
	.port_names[0]	= "lan1",
	.port_names[1]	= "lan2",
	.port_names[2]	= "lan3",
	.port_names[3]	= "lan4",
	.port_names[4]	= "wan",
	.port_names[5]	= "cpu",
};

static struct dsa_platform_data mv88f6281gtw_ge_switch_plat_data = {
	.nr_chips	= 1,
	.chip		= &mv88f6281gtw_ge_switch_chip_data,
};

void __init mv88f6281gtw_ge_init(void)
{
	kirkwood_ge00_init(&mv88f6281gtw_ge_ge00_data);
	kirkwood_ge00_switch_init(&mv88f6281gtw_ge_switch_plat_data, NO_IRQ);
}
Loading