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Commit e62687f9 authored by Robin Getz's avatar Robin Getz Committed by Bryan Wu
Browse files

Blackfin arch: fix the aliased write macros 



Signed-off-by: default avatarRobin Getz <robin.getz@analog.com>
Signed-off-by: default avatarBryan Wu <bryan.wu@analog.com>
parent 4bbd10fd

include/asm-blackfin/mach-bf561/cdefBF561.h

+2 −2
Original line number Diff line number Diff line
@@ -83,9 +83,9 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val) 


/* For MMR's that are reserved on Core B, set up defines to better integrate with other ports */

#define bfin_read_SWRST()                    bfin_read_SICA_SWRST()

#define bfin_write_SWRST()                   bfin_write_SICA_SWRST()

#define bfin_write_SWRST(val)                bfin_write_SICA_SWRST(val)

#define bfin_read_SYSCR()                    bfin_read_SICA_SYSCR()

#define bfin_write_SYSCR()                   bfin_write_SICA_SYSCR()

#define bfin_write_SYSCR(val)                bfin_write_SICA_SYSCR(val)



/* System Reset and Interrupt Controller registers for core A (0xFFC0 0100-0xFFC0 01FF) */

#define bfin_read_SICA_SWRST()               bfin_read16(SICA_SWRST)