msm: mdss: handle DSI ctrl/PHY regulator control properly

Power on/off of the DSI regulators is currently tied to the state
of the DSI Panel as part of DSI clock control API. During
mdss_dsi_on(), the panel will still be blanked but DSI is powered
on. Due to the current logic, we will end up powering down the DSI
ctrl/PHY regulators at the end of mdss_dsi_on() for command mode
panels when we turn off the DSI core and link clocks. This might
cause an abnormal waveform during resume on DSI clock/data lanes
until we power ON back the DSI regulators as part of DSI panel
unblank. Fix this by using the DSI controller state variable instead
of DSI panel state.

Change-Id: Icfa3910f7204c3db63e21a9c9ba082430c0fdf56
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>