Merge branch 'for-3.3/soc' of...

ff000000	ffbfffff	Reserved for future expansion of DMA

				mapping region.

VMALLOC_END	feffffff	Free for platform use, recommended.

				VMALLOC_END must be aligned to a 2MB

				boundary.

VMALLOC_START	VMALLOC_END-1	vmalloc() / ioremap() space.

				Memory returned by vmalloc/ioremap will

				be dynamically placed in this region.

				VMALLOC_START may be based upon the value

				of the high_memory variable.

				Machine specific static mappings are also

				located here through iotable_init().

				VMALLOC_START is based upon the value

				of the high_memory variable, and VMALLOC_END

				is equal to 0xff000000.

PAGE_OFFSET	high_memory-1	Kernel direct-mapped RAM region.

				This maps the platforms RAM, and typically

- interrupts	: Interrupt source of the parent interrupt controller. Only

  present on secondary GICs.

- cpu-offset	: per-cpu offset within the distributor and cpu interface

  regions, used when the GIC doesn't have banked registers. The offset is

  cpu-offset * cpu-nr.

Example:

	intc: interrupt-controller@fff11000 {

NVIDIA Tegra device tree bindings

-------------------------------------------

Boards with the tegra20 SoC shall have the following properties:

Required root node property:

compatible = "nvidia,tegra20";

Boards with the tegra30 SoC shall have the following properties:

Required root node property:

compatible = "nvidia,tegra30";

* ARM Vectored Interrupt Controller

One or more Vectored Interrupt Controllers (VIC's) can be connected in an ARM

system for interrupt routing.  For multiple controllers they can either be

nested or have the outputs wire-OR'd together.

Required properties:

- compatible : should be one of

	"arm,pl190-vic"

	"arm,pl192-vic"

- interrupt-controller : Identifies the node as an interrupt controller

- #interrupt-cells : The number of cells to define the interrupts.  Must be 1 as

  the VIC has no configuration options for interrupt sources.  The cell is a u32

  and defines the interrupt number.

- reg : The register bank for the VIC.

Optional properties:

- interrupts : Interrupt source for parent controllers if the VIC is nested.

Example:

	vic0: interrupt-controller@60000 {

		compatible = "arm,pl192-vic";

		interrupt-controller;

		#interrupt-cells = <1>;

		reg = <0x60000 0x1000>;

	};

Tegra SOC USB controllers

The device node for a USB controller that is part of a Tegra

SOC is as described in the document "Open Firmware Recommended

Practice : Universal Serial Bus" with the following modifications

and additions :

Required properties :

 - compatible : Should be "nvidia,tegra20-ehci" for USB controllers

   used in host mode.

 - phy_type : Should be one of "ulpi" or "utmi".

 - nvidia,vbus-gpio : If present, specifies a gpio that needs to be

   activated for the bus to be powered.