Loading arch/arm/boot/dts/qcom/mdmcalifornium-pinctrl.dtsi +3 −3 Original line number Diff line number Diff line Loading @@ -356,13 +356,13 @@ pcie0_wake_default: pcie0_wake_default { mux { pins = "gpio65"; pins = "gpio61"; function = "gpio"; }; config { pins = "gpio65"; pins = "gpio61"; drive-strength = <2>; bias-pull-down; bias-disable; }; }; Loading arch/arm/boot/dts/qcom/mdmcalifornium.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -361,7 +361,7 @@ &pcie0_wake_default>; perst-gpio = <&tlmm_pinmux 60 0>; wake-gpio = <&tlmm_pinmux 65 0>; wake-gpio = <&tlmm_pinmux 61 0>; gdsc-vdd-supply = <&gdsc_pcie>; vreg-1.8-supply = <&pmdcalifornium_l5>; Loading Loading
arch/arm/boot/dts/qcom/mdmcalifornium-pinctrl.dtsi +3 −3 Original line number Diff line number Diff line Loading @@ -356,13 +356,13 @@ pcie0_wake_default: pcie0_wake_default { mux { pins = "gpio65"; pins = "gpio61"; function = "gpio"; }; config { pins = "gpio65"; pins = "gpio61"; drive-strength = <2>; bias-pull-down; bias-disable; }; }; Loading
arch/arm/boot/dts/qcom/mdmcalifornium.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -361,7 +361,7 @@ &pcie0_wake_default>; perst-gpio = <&tlmm_pinmux 60 0>; wake-gpio = <&tlmm_pinmux 65 0>; wake-gpio = <&tlmm_pinmux 61 0>; gdsc-vdd-supply = <&gdsc_pcie>; vreg-1.8-supply = <&pmdcalifornium_l5>; Loading