Davinci: psc - use ioremap() (e4c822c7) · Commits · e / devices / android_kernel_xiaomi_markw

arch/arm/mach-davinci/clock.c

+11 −3

Original line number	Diff line number	Diff line
		@@ -302,7 +302,6 @@ static unsigned long clk_pllclk_recalc(struct clk *clk)
		struct pll_data *pll = clk->pll_data;
		unsigned long rate = clk->rate;

		pll->base = IO_ADDRESS(pll->phys_base);
		ctrl = __raw_readl(pll->base + PLLCTL);
		rate = pll->input_rate = clk->parent->rate;

		@@ -458,8 +457,17 @@ int __init davinci_clk_init(struct clk_lookup *clocks)
		clk->recalc = clk_leafclk_recalc;
		}

		if (clk->pll_data && !clk->pll_data->div_ratio_mask)
		clk->pll_data->div_ratio_mask = PLLDIV_RATIO_MASK;
		if (clk->pll_data) {
		struct pll_data *pll = clk->pll_data;

		if (!pll->div_ratio_mask)
		pll->div_ratio_mask = PLLDIV_RATIO_MASK;

		if (pll->phys_base && !pll->base) {
		pll->base = ioremap(pll->phys_base, SZ_4K);
		WARN_ON(!pll->base);
		}
		}

		if (clk->recalc)
		clk->rate = clk->recalc(clk);

+1 −4

Original line number	Diff line number	Diff line
		@@ -1127,10 +1127,7 @@ static struct map_desc da830_io_desc[] = {
		},
		};

		static void __iomem *da830_psc_bases[] = {
		IO_ADDRESS(DA8XX_PSC0_BASE),
		IO_ADDRESS(DA8XX_PSC1_BASE),
		};
		static u32 da830_psc_bases[] = { DA8XX_PSC0_BASE, DA8XX_PSC1_BASE };

		/* Contents of JTAG ID register used to identify exact cpu type */
		static struct davinci_id da830_ids[] = {

+1 −4

Original line number	Diff line number	Diff line
		@@ -782,10 +782,7 @@ static struct map_desc da850_io_desc[] = {
		},
		};

		static void __iomem *da850_psc_bases[] = {
		IO_ADDRESS(DA8XX_PSC0_BASE),
		IO_ADDRESS(DA8XX_PSC1_BASE),
		};
		static u32 da850_psc_bases[] = { DA8XX_PSC0_BASE, DA8XX_PSC1_BASE };

		/* Contents of JTAG ID register used to identify exact cpu type */
		static struct davinci_id da850_ids[] = {

+1 −3

Original line number	Diff line number	Diff line
		@@ -783,9 +783,7 @@ static struct davinci_id dm355_ids[] = {
		},
		};

		static void __iomem *dm355_psc_bases[] = {
		IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE),
		};
		static u32 dm355_psc_bases[] = { DAVINCI_PWR_SLEEP_CNTRL_BASE };

		/*
		* T0_BOT: Timer 0, bottom: clockevent source for hrtimers

+1 −3

Original line number	Diff line number	Diff line
		@@ -1002,9 +1002,7 @@ static struct davinci_id dm365_ids[] = {
		},
		};

		static void __iomem *dm365_psc_bases[] = {
		IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE),
		};
		static u32 dm365_psc_bases[] = { DAVINCI_PWR_SLEEP_CNTRL_BASE };

		static struct davinci_timer_info dm365_timer_info = {
		.timers = davinci_timer_instance,