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Commit e467b392 authored by xiaonian's avatar xiaonian Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Add DDR52 mode frequency for QRD8937 



Add corresponding frequency in SDHC1 node to support
DDR52 mode for eMMC on QRD8937.

CRs-Fixed: 984710
Change-Id: Ib8d2b3327aa456cfbf79dd7bcdfe18c44e63a565
Signed-off-by: default avatarxiaonian <xiaonian@codeaurora.org>
parent f3ec66d6

arch/arm/boot/dts/qcom/msm8937-qrd.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -95,7 +95,7 @@ 
	pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;

	pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>;



	qcom,clk-rates = <400000 20000000 25000000 50000000 192000000

	qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 192000000

								384000000>;

	qcom,nonremovable;

	qcom,bus-speed-mode = "HS400_1p8v", "HS200_1p8v", "DDR_1p8v";