Loading Documentation/devicetree/bindings/pil/pil-q6v5-mss.txt +2 −0 Original line number Diff line number Diff line Loading @@ -77,6 +77,8 @@ Optional properties: current issue. - qcom,qdsp6v61-1-1: Boolean- Present if the qdsp version is v61 1.1 - qcom,qdsp6v62-1-2: Boolean- Present if the qdsp version is v62 1.2 - qcom,mx-spike-wa: Boolean- Present if we need to assert QDSP6 I/O clamp, memory wordline clamp, and compiler memory clamp during MSS restart. Example: qcom,mss@fc880000 { Loading drivers/soc/qcom/pil-msa.c +12 −0 Original line number Diff line number Diff line Loading @@ -284,6 +284,18 @@ int pil_mss_shutdown(struct pil_desc *pil) if (drv->axi_halt_nc) pil_q6v5_halt_axi_port(pil, drv->axi_halt_nc); /* * Software workaround to avoid high MX current during LPASS/MSS * restart. */ if (drv->mx_spike_wa && drv->ahb_clk_vote) { ret = clk_prepare_enable(drv->ahb_clk); if (!ret) assert_clamps(pil); else dev_err(pil->dev, "error turning ON AHB clock\n"); } ret = pil_mss_restart_reg(drv, 1); if (drv->is_booted) { Loading drivers/soc/qcom/pil-q6v5.c +20 −0 Original line number Diff line number Diff line Loading @@ -203,6 +203,24 @@ void pil_q6v5_halt_axi_port(struct pil_desc *pil, void __iomem *halt_base) } EXPORT_SYMBOL(pil_q6v5_halt_axi_port); void assert_clamps(struct pil_desc *pil) { u32 val; struct q6v5_data *drv = container_of(pil, struct q6v5_data, desc); /* * Assert QDSP6 I/O clamp, memory wordline clamp, and compiler memory * clamp as a software workaround to avoid high MX current during * LPASS/MSS restart. */ val = readl_relaxed(drv->reg_base + QDSP6SS_PWR_CTL); val |= (Q6SS_CLAMP_IO | QDSP6v55_CLAMP_WL | QDSP6v55_CLAMP_QMC_MEM); writel_relaxed(val, drv->reg_base + QDSP6SS_PWR_CTL); /* To make sure asserting clamps is done before MSS restart*/ mb(); } static void __pil_q6v5_shutdown(struct pil_desc *pil) { u32 val; Loading Loading @@ -638,6 +656,8 @@ struct q6v5_data *pil_q6v5_init(struct platform_device *pdev) drv->ahb_clk_vote = of_property_read_bool(pdev->dev.of_node, "qcom,ahb-clk-vote"); drv->mx_spike_wa = of_property_read_bool(pdev->dev.of_node, "qcom,mx-spike-wa"); drv->xo = devm_clk_get(&pdev->dev, "xo"); if (IS_ERR(drv->xo)) Loading drivers/soc/qcom/pil-q6v5.h +2 −0 Original line number Diff line number Diff line Loading @@ -65,6 +65,7 @@ struct q6v5_data { bool restart_reg_sec; bool override_acc; bool ahb_clk_vote; bool mx_spike_wa; }; int pil_q6v5_make_proxy_votes(struct pil_desc *pil); Loading @@ -72,6 +73,7 @@ void pil_q6v5_remove_proxy_votes(struct pil_desc *pil); void pil_q6v5_halt_axi_port(struct pil_desc *pil, void __iomem *halt_base); void pil_q6v5_shutdown(struct pil_desc *pil); int pil_q6v5_reset(struct pil_desc *pil); void assert_clamps(struct pil_desc *pil); struct q6v5_data *pil_q6v5_init(struct platform_device *pdev); #endif Loading
Documentation/devicetree/bindings/pil/pil-q6v5-mss.txt +2 −0 Original line number Diff line number Diff line Loading @@ -77,6 +77,8 @@ Optional properties: current issue. - qcom,qdsp6v61-1-1: Boolean- Present if the qdsp version is v61 1.1 - qcom,qdsp6v62-1-2: Boolean- Present if the qdsp version is v62 1.2 - qcom,mx-spike-wa: Boolean- Present if we need to assert QDSP6 I/O clamp, memory wordline clamp, and compiler memory clamp during MSS restart. Example: qcom,mss@fc880000 { Loading
drivers/soc/qcom/pil-msa.c +12 −0 Original line number Diff line number Diff line Loading @@ -284,6 +284,18 @@ int pil_mss_shutdown(struct pil_desc *pil) if (drv->axi_halt_nc) pil_q6v5_halt_axi_port(pil, drv->axi_halt_nc); /* * Software workaround to avoid high MX current during LPASS/MSS * restart. */ if (drv->mx_spike_wa && drv->ahb_clk_vote) { ret = clk_prepare_enable(drv->ahb_clk); if (!ret) assert_clamps(pil); else dev_err(pil->dev, "error turning ON AHB clock\n"); } ret = pil_mss_restart_reg(drv, 1); if (drv->is_booted) { Loading
drivers/soc/qcom/pil-q6v5.c +20 −0 Original line number Diff line number Diff line Loading @@ -203,6 +203,24 @@ void pil_q6v5_halt_axi_port(struct pil_desc *pil, void __iomem *halt_base) } EXPORT_SYMBOL(pil_q6v5_halt_axi_port); void assert_clamps(struct pil_desc *pil) { u32 val; struct q6v5_data *drv = container_of(pil, struct q6v5_data, desc); /* * Assert QDSP6 I/O clamp, memory wordline clamp, and compiler memory * clamp as a software workaround to avoid high MX current during * LPASS/MSS restart. */ val = readl_relaxed(drv->reg_base + QDSP6SS_PWR_CTL); val |= (Q6SS_CLAMP_IO | QDSP6v55_CLAMP_WL | QDSP6v55_CLAMP_QMC_MEM); writel_relaxed(val, drv->reg_base + QDSP6SS_PWR_CTL); /* To make sure asserting clamps is done before MSS restart*/ mb(); } static void __pil_q6v5_shutdown(struct pil_desc *pil) { u32 val; Loading Loading @@ -638,6 +656,8 @@ struct q6v5_data *pil_q6v5_init(struct platform_device *pdev) drv->ahb_clk_vote = of_property_read_bool(pdev->dev.of_node, "qcom,ahb-clk-vote"); drv->mx_spike_wa = of_property_read_bool(pdev->dev.of_node, "qcom,mx-spike-wa"); drv->xo = devm_clk_get(&pdev->dev, "xo"); if (IS_ERR(drv->xo)) Loading
drivers/soc/qcom/pil-q6v5.h +2 −0 Original line number Diff line number Diff line Loading @@ -65,6 +65,7 @@ struct q6v5_data { bool restart_reg_sec; bool override_acc; bool ahb_clk_vote; bool mx_spike_wa; }; int pil_q6v5_make_proxy_votes(struct pil_desc *pil); Loading @@ -72,6 +73,7 @@ void pil_q6v5_remove_proxy_votes(struct pil_desc *pil); void pil_q6v5_halt_axi_port(struct pil_desc *pil, void __iomem *halt_base); void pil_q6v5_shutdown(struct pil_desc *pil); int pil_q6v5_reset(struct pil_desc *pil); void assert_clamps(struct pil_desc *pil); struct q6v5_data *pil_q6v5_init(struct platform_device *pdev); #endif