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Commit e3d934fa authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: add boost frequency for cpufreq and devfreq for msm8996pro"

parents 5bfd7272 9248f073

arch/arm/boot/dts/qcom/msm8996pro.dtsi

+37 −32
Original line number Diff line number Diff line
@@ -37,19 +37,15 @@ 


&apc0_pwrcl_vreg {

	regulator-min-microvolt = <1>;

	/*

	 * Note that corner 19 cannot be set by software.  It is used only as a

	 * reference for interpolation.

	 */

	regulator-max-microvolt = <18>;

	regulator-max-microvolt = <20>;



	qcom,cpr-fuse-corners = <5>;

	qcom,cpr-fuse-combos = <16>;

	qcom,cpr-speed-bins = <2>;

	qcom,cpr-speed-bin-corners = <19 19>;

	qcom,cpr-speed-bin-corners = <20 19>;

	qcom,cpr-corners =

		/* Speed bin 0 */

		<19 19 19 19 19 19 19 19>,

		<20 20 20 20 20 20 20 20>,



		/* Speed bin 1 */

		<19 19 19 19 19 19 19 19>;
@@ -65,7 +61,7 @@ 
		/* Speed bin 0 */

		<670000  670000  670000  670000  670000  670000  745000  745000

		 745000  905000  905000  905000  905000  905000 1140000 1140000

		1140000 1140000 1140000>,

		1140000 1140000 1140000 1140000>,



		/* Speed bin 1 */

		<670000  670000  670000  670000  670000  670000  745000  745000
@@ -76,7 +72,7 @@ 
		/* Speed bin 0 */

		<470000  470000  470000  470000  470000  470000  470000  470000

		 470000  470000  470000  470000  470000  470000  470000  470000

		 470000  470000  470000>,

		 470000  470000  470000  470000>,



		/* Speed bin 1 */

		<470000  470000  470000  470000  470000  470000  470000  470000
@@ -87,7 +83,7 @@ 
		/* Speed bin 0 */

		<80000   80000   80000   80000   80000   80000   80000   80000

		 80000   80000   80000   80000   80000   80000   80000   80000

		 80000   80000   80000>,

		 80000   80000   80000   80000>,



		/* Speed bin 1 */

		<80000   80000   80000   80000   80000   80000   80000   80000
@@ -99,7 +95,7 @@ 
		<307200000  384000000  460800000  537600000  614400000

		 691200000  768000000  844800000  902400000  979200000

		1056000000 1132800000 1209600000 1286400000 1363200000

		1440000000 1516800000 1593600000 1785600000>,

		1440000000 1516800000 1593600000 1785600000 2188800000>,



		/* Speed bin 1 */

		<307200000  384000000  460800000  537600000  614400000
@@ -160,7 +156,7 @@ 
		/* Speed bin 0 */

		<(-15000) (-15000) (-15000) (-15000) (-15000) (-15000) (-15000)

		 (-15000) (-15000) (-17000) (-19000) (-21000) (-23000) (-25000)

		 (-26000) (-27000) (-27000) (-28000) (-30000)>,

		 (-26000) (-27000) (-27000) (-28000) (-30000)  130000>,



		/* Speed bin 1 */

		<(-15000) (-15000) (-15000) (-15000) (-15000) (-15000) (-15000)
@@ -169,7 +165,7 @@ 


	qcom,cpr-open-loop-voltage-min-diff =

		/* Speed bin 0 */

	       <0 0 0 0 (-50000) 0 0 0 0 0 0 0 0 0 0 0 0 0 0>,

	       <0 0 0 0 (-50000) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>,



		/* Speed bin 1 */

	       <0 0 0 0 (-50000) 0 0 0 0 0 0 0 0 0 0 0 0 0 0>;
@@ -178,7 +174,7 @@ 
		/* Speed bin 0 */

		<(-15000) (-15000) (-15000) (-15000) (-15000) (-15000) (-15000)

		 (-15000) (-15000) (-17000) (-19000) (-21000) (-23000) (-25000)

		 (-26000) (-27000) (-27000) (-28000) (-30000)>,

		 (-26000) (-27000) (-27000) (-28000) (-30000)  130000>,



		/* Speed bin 1 */

		<(-15000) (-15000) (-15000) (-15000) (-15000) (-15000) (-15000)
@@ -321,22 +317,22 @@ 


&apc1_vreg {

	regulator-min-microvolt = <1>;

	regulator-max-microvolt = <25>;

	regulator-max-microvolt = <27>;



	qcom,cpr-fuse-corners = <5>;

	qcom,cpr-fuse-combos = <16>;

	qcom,cpr-speed-bins = <2>;

	qcom,cpr-speed-bin-corners = <25 25>;

	qcom,cpr-speed-bin-corners = <27 25>;

	qcom,cpr-corners =

		/* Speed bin 0 */

		<25 25 25 25 25 25 25 25>,

		<27 27 27 27 27 27 27 27>,



		/* Speed bin 1 */

		<25 25 25 25 25 25 25 25>;



	qcom,cpr-corner-fmax-map =

		/* Speed bin 0 */

		<1 7 10 15 25>,

		<1 7 10 15 27>,



		/* Speed bin 1 */

		<1 7 10 15 25>;
@@ -346,7 +342,7 @@ 
		<670000  670000  670000  670000  670000  670000  670000  745000

		 745000  745000  905000  905000  905000  905000  905000 1140000

		1140000 1140000 1140000 1140000 1140000 1140000 1140000 1140000

		1140000>,

		1140000 1140000 1140000>,



		/* Speed bin 1 */

		<670000  670000  670000  670000  670000  670000  670000  745000
@@ -359,7 +355,7 @@ 
		<470000  470000  470000  470000  470000  470000  470000  470000

		 470000  470000  470000  470000  470000  470000  470000  470000

		 470000  470000  470000  470000  470000  470000  470000  470000

		 470000>,

		 470000  470000  470000>,



		/* Speed bin 1 */

		<470000  470000  470000  470000  470000  470000  470000  470000
@@ -372,7 +368,7 @@ 
		 <80000   80000   80000   80000   80000   80000   80000   80000

		  80000   80000   80000   80000   80000   80000   80000   80000

		  80000   80000   80000   80000   80000   80000   80000   80000

		  80000>,

		  80000   80000   80000>,



		 /* Speed bin 1 */

		 <80000   80000   80000   80000   80000   80000   80000   80000
@@ -386,7 +382,8 @@ 
		 691200000  748800000  825600000  902400000  979200000

		1056000000 1132800000 1209600000 1286400000 1363200000

		1440000000 1516800000 1593600000 1670400000 1747200000

		1824000000 1900800000 1977600000 2054400000 2150400000>,

		1824000000 1900800000 1977600000 2054400000 2150400000

		2246400000 2342400000>,



		/* Speed bin 1 */

		<307200000  384000000  460800000  537600000  614400000
@@ -449,7 +446,7 @@ 
		<(-15000) (-15000) (-15000) (-15000) (-15000) (-15000) (-15000)

		 (-15000) (-15000) (-15000) (-17000) (-19000) (-21000) (-23000)

		 (-25000) (-25000) (-26000) (-26000) (-27000) (-27000) (-28000)

		 (-28000) (-29000) (-29000) (-30000)>,

		 (-28000) (-29000) (-29000) (-30000) (-30000) (-30000)>,



		/* Speed bin 1 */

		<(-15000) (-15000) (-15000) (-15000) (-15000) (-15000) (-15000)
@@ -459,7 +456,7 @@ 


	qcom,cpr-open-loop-voltage-min-diff =

		/* Speed bin 0 */

		<0 0 0 0 (-50000) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>,

		<0 0 0 0 (-50000) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>,



		/* Speed bin 1 */

		<0 0 0 0 (-50000) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>;
@@ -469,7 +466,7 @@ 
		<(-15000) (-15000) (-15000) (-15000) (-15000) (-15000) (-15000)

		 (-15000) (-15000) (-15000) (-17000) (-19000) (-21000) (-23000)

		 (-25000) (-25000) (-26000) (-26000) (-27000) (-27000) (-28000)

		 (-28000) (-29000) (-29000) (-30000)>,

		 (-28000) (-29000) (-29000) (-30000) (-30000) (-30000)>,



		/* Speed bin 1 */

		<(-15000) (-15000) (-15000) (-15000) (-15000) (-15000) (-15000)
@@ -656,7 +653,8 @@ 
		< 1363200000 15 >,

		< 1440000000 16 >,

		< 1516800000 17 >,

		< 1593600000 18 >;

		< 1593600000 18 >,

		< 2188800000 20 >;

	qcom,pwrcl-speedbin1-v0 =

		<          0  0 >,

		<  307200000  1 >,
@@ -703,8 +701,9 @@ 
		< 1900800000 22 >,

		< 1977600000 23 >,

		< 2054400000 24 >,

		< 2150400000 25 >;

		/* Additional frequencies to be added after characterization. */

		< 2150400000 25 >,

		< 2246400000 26 >,

		< 2342400000 27 >;

	qcom,perfcl-speedbin1-v0 =

		<          0  0 >,

		<  307200000  1 >,
@@ -845,7 +844,8 @@ 
		< 1363200 >,

		< 1440000 >,

		< 1516800 >,

		< 1593600 >;

		< 1593600 >,

		< 2188800 >;

	qcom,cpufreq-table-2 =

		<  307200 >,

		<  384000 >,
@@ -871,7 +871,9 @@ 
		< 1900800 >,

		< 1977600 >,

		< 2054400 >,

		< 2150400 >;

		< 2150400 >,

		< 2246400 >,

		< 2342400 >;

};



&m4m_cache {
@@ -917,7 +919,8 @@ 
			< 1363200 1056000 >,

			< 1440000 1132800 >,

			< 1516800 1190400 >,

			< 1593600 1286400 >;

			< 1593600 1286400 >,

			< 2188800 1593600 >;

		cpu-to-dev-map-2 =

			<  307200  192000 >,

			<  384000  192000 >,
@@ -943,7 +946,9 @@ 
			< 1900800 1516800 >,

			< 1977600 1593600 >,

			< 2054400 1593600 >,

			< 2150400 1593600 >;

			< 2150400 1593600 >,

			< 2246400 1593600 >,

			< 2342400 1593600 >;

	};



	mincpubw-cpufreq {