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Commit e3a8f7b8 authored by Yasuaki Ishimatsu's avatar Yasuaki Ishimatsu Committed by Tony Luck
Browse files

[IA64] Remove block structure for locking in iosapic.c 



Remove unnecessary indent between spin_lock() and spin_unlock() in
iosapic.c. This has no functional changes.

Signed-off-by: default avatarKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: default avatarYasuaki Ishimatsu <isimatu.yasuaki@jp.fujitsu.com>
Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
parent a5fcaa21

arch/ia64/kernel/iosapic.c

+135 −166
Original line number Diff line number Diff line
@@ -209,9 +209,7 @@ gsi_to_irq (unsigned int gsi) 
	 * and Linux irq numbers...

	 */

	spin_lock_irqsave(&iosapic_lock, flags);

	{

	irq = _gsi_to_vector(gsi);

	}

	spin_unlock_irqrestore(&iosapic_lock, flags);



	return irq;
@@ -322,16 +320,13 @@ mask_irq (unsigned int irq) 
		return;			/* not an IOSAPIC interrupt! */



	spin_lock_irqsave(&iosapic_lock, flags);

	{

	/* set only the mask bit */

	low32 = iosapic_intr_info[vec].low32 |= IOSAPIC_MASK;

		list_for_each_entry(rte, &iosapic_intr_info[vec].rtes,

				    rte_list) {

	list_for_each_entry(rte, &iosapic_intr_info[vec].rtes, rte_list) {

		addr = rte->addr;

		rte_index = rte->rte_index;

		iosapic_write(addr, IOSAPIC_RTE_LOW(rte_index), low32);

	}

	}

	spin_unlock_irqrestore(&iosapic_lock, flags);

}
@@ -349,15 +344,12 @@ unmask_irq (unsigned int irq) 
		return;			/* not an IOSAPIC interrupt! */



	spin_lock_irqsave(&iosapic_lock, flags);

	{

	low32 = iosapic_intr_info[vec].low32 &= ~IOSAPIC_MASK;

		list_for_each_entry(rte, &iosapic_intr_info[vec].rtes,

				    rte_list) {

	list_for_each_entry(rte, &iosapic_intr_info[vec].rtes, rte_list) {

		addr = rte->addr;

		rte_index = rte->rte_index;

		iosapic_write(addr, IOSAPIC_RTE_LOW(rte_index), low32);

	}

	}

	spin_unlock_irqrestore(&iosapic_lock, flags);

}
@@ -391,29 +383,22 @@ iosapic_set_affinity (unsigned int irq, cpumask_t mask) 
	high32 = dest << IOSAPIC_DEST_SHIFT;



	spin_lock_irqsave(&iosapic_lock, flags);

	{

		low32 = iosapic_intr_info[vec].low32 &

			~(7 << IOSAPIC_DELIVERY_SHIFT);



	low32 = iosapic_intr_info[vec].low32 & ~(7 << IOSAPIC_DELIVERY_SHIFT);

	if (redir)

		/* change delivery mode to lowest priority */

			low32 |= (IOSAPIC_LOWEST_PRIORITY <<

				  IOSAPIC_DELIVERY_SHIFT);

		low32 |= (IOSAPIC_LOWEST_PRIORITY << IOSAPIC_DELIVERY_SHIFT);

	else

		/* change delivery mode to fixed */

		low32 |= (IOSAPIC_FIXED << IOSAPIC_DELIVERY_SHIFT);



	iosapic_intr_info[vec].low32 = low32;

	iosapic_intr_info[vec].dest = dest;

		list_for_each_entry(rte, &iosapic_intr_info[vec].rtes,

				    rte_list) {

	list_for_each_entry(rte, &iosapic_intr_info[vec].rtes, rte_list) {

		addr = rte->addr;

		rte_index = rte->rte_index;

			iosapic_write(addr, IOSAPIC_RTE_HIGH(rte_index),

				      high32);

		iosapic_write(addr, IOSAPIC_RTE_HIGH(rte_index), high32);

		iosapic_write(addr, IOSAPIC_RTE_LOW(rte_index), low32);

	}

	}

	spin_unlock_irqrestore(&iosapic_lock, flags);

#endif

}
@@ -797,7 +782,6 @@ again: 
	 * don't touch the RTE.

	 */

	spin_lock_irqsave(&iosapic_lock, flags);

	{

	vector = gsi_to_vector(gsi);

	if (vector > 0) {

		rte = gsi_vector_to_rte(gsi, vector);
@@ -805,7 +789,6 @@ again: 
		spin_unlock_irqrestore(&iosapic_lock, flags);

		return vector;

	}

	}

	spin_unlock_irqrestore(&iosapic_lock, flags);



	/* If vector is running out, we try to find a sharable vector */
@@ -818,13 +801,11 @@ again: 


	spin_lock_irqsave(&irq_desc[vector].lock, flags);

	spin_lock(&iosapic_lock);

	{

	if (gsi_to_vector(gsi) > 0) {

		if (list_empty(&iosapic_intr_info[vector].rtes))

			free_irq_vector(vector);

		spin_unlock(&iosapic_lock);

			spin_unlock_irqrestore(&irq_desc[vector].lock,

					       flags);

		spin_unlock_irqrestore(&irq_desc[vector].lock, flags);

		goto again;

	}
@@ -833,20 +814,18 @@ again: 
			    polarity, trigger);

	if (err < 0) {

		spin_unlock(&iosapic_lock);

			spin_unlock_irqrestore(&irq_desc[vector].lock,

					       flags);

		spin_unlock_irqrestore(&irq_desc[vector].lock, flags);

		return err;

	}



	/*

		 * If the vector is shared and already unmasked for

		 * other interrupt sources, don't mask it.

	 * If the vector is shared and already unmasked for other

	 * interrupt sources, don't mask it.

	 */

	low32 = iosapic_intr_info[vector].low32;

	if (vector_is_shared(vector) && !(low32 & IOSAPIC_MASK))

		mask = 0;

	set_rte(gsi, vector, dest, mask);

	}

	spin_unlock(&iosapic_lock);

	spin_unlock_irqrestore(&irq_desc[vector].lock, flags);
@@ -886,10 +865,8 @@ iosapic_unregister_intr (unsigned int gsi) 
	idesc = irq_desc + irq;

	spin_lock_irqsave(&idesc->lock, flags);

	spin_lock(&iosapic_lock);

	{

	if ((rte = gsi_vector_to_rte(gsi, vector)) == NULL) {

			printk(KERN_ERR

			       "iosapic_unregister_intr(%u) unbalanced\n",

		printk(KERN_ERR "iosapic_unregister_intr(%u) unbalanced\n",

		       gsi);

		WARN_ON(1);

		goto out;
@@ -900,8 +877,7 @@ iosapic_unregister_intr (unsigned int gsi) 


	/* Mask the interrupt */

	low32 = iosapic_intr_info[vector].low32 | IOSAPIC_MASK;

		iosapic_write(rte->addr, IOSAPIC_RTE_LOW(rte->rte_index),

			      low32);

	iosapic_write(rte->addr, IOSAPIC_RTE_LOW(rte->rte_index), low32);



	/* Remove the rte entry from the list */

	list_del(&rte->rte_list);
@@ -915,8 +891,7 @@ iosapic_unregister_intr (unsigned int gsi) 
	polarity = iosapic_intr_info[vector].polarity;

	dest     = iosapic_intr_info[vector].dest;

	printk(KERN_INFO

		       "GSI %u (%s, %s) -> CPU %d (0x%04x)"

		       " vector %d unregistered\n",

	       "GSI %u (%s, %s) -> CPU %d (0x%04x) vector %d unregistered\n",

	       gsi, (trigger == IOSAPIC_EDGE ? "edge" : "level"),

	       (polarity == IOSAPIC_POL_HIGH ? "high" : "low"),

	       cpu_logical_id(dest), dest, vector);
@@ -941,15 +916,14 @@ iosapic_unregister_intr (unsigned int gsi) 


		if (idesc->action) {

			printk(KERN_ERR

				       "interrupt handlers still exist on"

				       "IRQ %u\n", irq);

			       "interrupt handlers still exist on IRQ %u\n",

			       irq);

			WARN_ON(1);

		}



		/* Free the interrupt vector */

		free_irq_vector(vector);

	}

	}

 out:

	spin_unlock(&iosapic_lock);

	spin_unlock_irqrestore(&idesc->lock, flags);
@@ -1108,7 +1082,6 @@ iosapic_init (unsigned long phys_addr, unsigned int gsi_base) 
	unsigned long flags;



	spin_lock_irqsave(&iosapic_lock, flags);

	{

	addr = ioremap(phys_addr, 0);

	ver = iosapic_version(addr);
@@ -1119,9 +1092,9 @@ iosapic_init (unsigned long phys_addr, unsigned int gsi_base) 
	}



	/*

		 * The MAX_REDIR register holds the highest input pin

		 * number (starting from 0).

		 * We add 1 so that we can use it for number of pins (= RTEs)

	 * The MAX_REDIR register holds the highest input pin number

	 * (starting from 0).  We add 1 so that we can use it for

	 * number of pins (= RTEs)

	 */

	num_rte = ((ver >> 16) & 0xff) + 1;
@@ -1132,7 +1105,6 @@ iosapic_init (unsigned long phys_addr, unsigned int gsi_base) 
#ifdef CONFIG_NUMA

	iosapic_lists[index].node = MAX_NUMNODES;

#endif

	}

	spin_unlock_irqrestore(&iosapic_lock, flags);



	if ((gsi_base == 0) && pcat_compat) {
@@ -1157,7 +1129,6 @@ iosapic_remove (unsigned int gsi_base) 
	unsigned long flags;



	spin_lock_irqsave(&iosapic_lock, flags);

	{

	index = find_iosapic(gsi_base);

	if (index < 0) {

		printk(KERN_WARNING "%s: No IOSAPIC for GSI base %u\n",
@@ -1167,15 +1138,13 @@ iosapic_remove (unsigned int gsi_base) 


	if (iosapic_lists[index].rtes_inuse) {

		err = -EBUSY;

			printk(KERN_WARNING

			       "%s: IOSAPIC for GSI base %u is busy\n",

		printk(KERN_WARNING "%s: IOSAPIC for GSI base %u is busy\n",

		       __FUNCTION__, gsi_base);

		goto out;

	}



	iounmap(iosapic_lists[index].addr);

	iosapic_free(index);

	}

 out:

	spin_unlock_irqrestore(&iosapic_lock, flags);

	return err;