Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit e10bc84d authored by Yaniv Rosner's avatar Yaniv Rosner Committed by David S. Miller
Browse files

bnx2x: Unify PHY attributes 



Start building the infrastructure for dual media by adding new component
of PHY which will be used all along the function. Modify function to
work with this component instead of the link_params.

Signed-off-by: default avatarYaniv Rosner <yanivr@broadcom.com>
Signed-off-by: default avatarEilon Greenstein <eilong@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent db40980f

drivers/net/bnx2x/bnx2x_ethtool.c

+9 −6
Original line number Diff line number Diff line
@@ -811,7 +811,7 @@ static int bnx2x_set_eeprom(struct net_device *dev, 
	struct bnx2x *bp = netdev_priv(dev);

	int port = BP_PORT(bp);

	int rc = 0;



	u32 ext_phy_config;

	if (!netif_running(dev))

		return -EAGAIN;
@@ -827,6 +827,10 @@ static int bnx2x_set_eeprom(struct net_device *dev, 
	    !bp->port.pmf)

		return -EINVAL;



	ext_phy_config =

		SHMEM_RD(bp,

			 dev_info.port_hw_config[port].external_phy_config);



	if (eeprom->magic == 0x50485950) {

		/* 'PHYP' (0x50485950): prepare phy for FW upgrade */

		bnx2x_stats_handle(bp, STATS_EVENT_STOP);
@@ -834,7 +838,7 @@ static int bnx2x_set_eeprom(struct net_device *dev, 
		bnx2x_acquire_phy_lock(bp);

		rc |= bnx2x_link_reset(&bp->link_params,

				       &bp->link_vars, 0);

		if (XGXS_EXT_PHY_TYPE(bp->link_params.ext_phy_config) ==

		if (XGXS_EXT_PHY_TYPE(ext_phy_config) ==

					PORT_HW_CFG_XGXS_EXT_PHY_TYPE_SFX7101)

			bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_0,

				       MISC_REGISTERS_GPIO_HIGH, port);
@@ -855,10 +859,8 @@ static int bnx2x_set_eeprom(struct net_device *dev, 
		}

	} else if (eeprom->magic == 0x53985943) {

		/* 'PHYC' (0x53985943): PHY FW upgrade completed */

		if (XGXS_EXT_PHY_TYPE(bp->link_params.ext_phy_config) ==

		if (XGXS_EXT_PHY_TYPE(ext_phy_config) ==

				       PORT_HW_CFG_XGXS_EXT_PHY_TYPE_SFX7101) {

			u8 ext_phy_addr =

			     XGXS_EXT_PHY_ADDR(bp->link_params.ext_phy_config);



			/* DSP Remove Download Mode */

			bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_0,
@@ -866,7 +868,8 @@ static int bnx2x_set_eeprom(struct net_device *dev, 


			bnx2x_acquire_phy_lock(bp);



			bnx2x_sfx7101_sp_sw_reset(bp, port, ext_phy_addr);

			bnx2x_sfx7101_sp_sw_reset(bp,

						&bp->link_params.phy[EXT_PHY1]);



			/* wait 0.5 sec to allow it to run */

			msleep(500);

drivers/net/bnx2x/bnx2x_hsi.h

+17 −0
Original line number Diff line number Diff line
@@ -120,6 +120,23 @@ struct shared_hw_cfg { /* NVRAM Offset */ 
#define SHARED_HW_CFG_FAN_FAILURE_DISABLED		      0x00080000

#define SHARED_HW_CFG_FAN_FAILURE_ENABLED		      0x00100000



	/* Set the MDC/MDIO access for the first external phy */

#define SHARED_HW_CFG_MDC_MDIO_ACCESS1_MASK	    0x1C000000

#define SHARED_HW_CFG_MDC_MDIO_ACCESS1_SHIFT	    26

#define SHARED_HW_CFG_MDC_MDIO_ACCESS1_PHY_TYPE     0x00000000

#define SHARED_HW_CFG_MDC_MDIO_ACCESS1_EMAC0	    0x04000000

#define SHARED_HW_CFG_MDC_MDIO_ACCESS1_EMAC1	    0x08000000

#define SHARED_HW_CFG_MDC_MDIO_ACCESS1_BOTH	    0x0c000000

#define SHARED_HW_CFG_MDC_MDIO_ACCESS1_SWAPPED	    0x10000000



	/* Set the MDC/MDIO access for the second external phy */

#define SHARED_HW_CFG_MDC_MDIO_ACCESS2_MASK	    0xE0000000

#define SHARED_HW_CFG_MDC_MDIO_ACCESS2_SHIFT	    29

#define SHARED_HW_CFG_MDC_MDIO_ACCESS2_PHY_TYPE     0x00000000

#define SHARED_HW_CFG_MDC_MDIO_ACCESS2_EMAC0	    0x20000000

#define SHARED_HW_CFG_MDC_MDIO_ACCESS2_EMAC1	    0x40000000

#define SHARED_HW_CFG_MDC_MDIO_ACCESS2_BOTH	    0x60000000

#define SHARED_HW_CFG_MDC_MDIO_ACCESS2_SWAPPED	    0x80000000

	u32 power_dissipated;					/* 0x11c */

#define SHARED_HW_CFG_POWER_DIS_CMN_MASK	    0xff000000

#define SHARED_HW_CFG_POWER_DIS_CMN_SHIFT	    24