Loading Documentation/devicetree/bindings/arm/msm/limits_supply_lm.txt 0 → 100644 +37 −0 Original line number Diff line number Diff line PMIC supply(S1) current limiting driver(SUPPLY_LM) ===================================== This driver is a current limit management module to help manage instantaneous peak current drawn by multiple subsystems on shared supply. The inputs to the mitigation algorithm are current states of different subsystems sharing this supply like cpu frequency, gpu frequency, number of cores online, soc temperature, core leakage, and modem state. It throttles cpu frequency and limits number of online cores to reduce the dynamic current so as to keep the total current drawn from supply in safe limits. The device tree parameters for SUPPLY_LM driver are: Required parameters: - compatible : Must be "qcom,supply-lm" - interrupts : SUPPLY_LM modem to apps interrupt details. - reg : Base addresses of the SUPPLY_LM modem interrupt data and its size in bytes. - reg-names : Name of SUPPLY_LM modem register in reg node. - qcom,supply-lm-very-hot-temp-range : SUPPLY_LM very hot temperature range info. It expects trigger and clear thresholds in order. - qcom,supply-lm-hot-temp-range : SUPPLY_LM hot temperature range info. It expects trigger and clear thresholds in order. - gpu-dev-opp: Phandle for gpu dev. Example: qcom,supply-lm { compatible = "qcom,supply-lm"; interrupts = <0 133 4>; reg = <0x01946000 0x8>; /* TCSR_TCSR_S1LM_MODEM_TO_APPS_INT and * TCSR_TCSR_S1LM_MODEM_TO_APPS_INT_DATA */ reg-names = "intr_reg"; qcom,supply-lm-very-hot-temp-range = <75 72>; qcom,supply-lm-hot-temp-range = <65 62>; gpu-dev-opp = <&msm_gpu>; }; Documentation/devicetree/bindings/arm/msm/lpm-workarounds.txt 0 → 100644 +55 −0 Original line number Diff line number Diff line * LPM Workarounds The required properties are: - compatible: "qcom,lpm-workarounds" The optional properties are: - reg: The physical address and the size of the l1_l2_gcc and l2_pwr_sts regitsters of performance cluster. - reg-names: "l2_pwr_sts" - string to identify l2_pwr_sts physical address. "l1_l2_gcc" - string to identify l1_l2_gcc physical address. - qcom,lpm-wa-cx-turbo-unvote: Indicates the workaround to unvote CX turbo vote when system is coming out of rpm assisted power collaspe. lpm-cx-supply is required if this is present. - lpm-cx-supply: will hold handle for CX regulator supply which is used to unvote. - qcom,lpm-wa-skip-l2-spm: Due to a hardware bug on 8939 and 8909, secure world needs to disable and enable L2 SPM to get the proper context in secure watchdog bite cases. With this workaround there is a race in programming L2 SPM between HLOS and secure world. This leads to stability issues. To avoid this program L2 SPM only in secure world based on the L2 mode flag passed. Set lpm-wa-skip-l2-spm node if this is required. - qcom,lpm-wa-dynamic-clock-gating: Due to a hardware bug on 8952, L1/L2 dynamic clock gating needs to be enabled by software for performance cluster cores and L2. Set lpm-wa-dynamic-clock-gating node if this workaround is required. - qcom,cpu-offline-mask: Dynamic clock gating should be enabled when cluster is in L2 PC. Each bit of cpu-offline-mask lists the cpu no. to hotplug by KTM driver. - qcom,non-boot-cpu-index: will hold index of non boot cluster cpu. - qcom,l1-l2-gcc-secure: indicates L1/L2 clock enabling register is secure. Example: qcom,lpm-workarounds { compatible = "qcom,lpm-workarounds"; reg = <0x0B011018 0x4>, <0x0B011088 0x4>; reg-names = "l2-pwr-sts", "l1-l2-gcc"; lpm-cx-supply = <&pm8916_s2_corner>; qcom,lpm-wa-cx-turbo-unvote; qcom,lpm-wa-skip-l2-spm; qcom,lpm-wa-dynamic-clock-gating; qcom,cpu-offline-mask = "0xF"; qcom,non-boot-cpu-index = <4>; } Documentation/devicetree/bindings/arm/msm/msm.txt +5 −0 Original line number Diff line number Diff line Loading @@ -110,6 +110,9 @@ SoCs: - MDM9607 compatible = "qcom,mdm9607" - MSM8909 compatible = "qcom,apq8009" Generic board variants: - CDP device: Loading Loading @@ -278,3 +281,5 @@ compatible = "qcom,mdmcalifornium-rumi" compatible = "qcom,mdmcalifornium-sim" compatible = "qcom,mdmcalifornium-cdp" compatible = "qcom,mdmcalifornium-mtp" compatible = "qcom,apq8009-cdp" compatible = "qcom,apq8009-mtp" Documentation/devicetree/bindings/arm/msm/msm_iommu_domains.txt 0 → 100644 +50 −0 Original line number Diff line number Diff line IOMMU Domains An IOMMU domain is a collection of IOMMU context banks and an optional virtual address space that is to be used with the domain. Domains that are defined will be created at bootup and associated with an iommu group. Clients can then refer to the iommu group and perform operations on the iommu group instead of individual devices/contexts. Required properties - compatible: "qcom,iommu-domains" - At least one child that defines a domain is required with the following properties: - label: Name of the domain - qcom,iommu-contexts: List of phandles to context that belongs to this domain. Optional properties - qcom,virtual-addr-pool: List of <start_address size> pairs that define the virtual address space for this domain. - qcom,secure-domain: boolean indicating that this is a secure domain that is to be programmed by Trustzone. - qcom,l2-redirect: boolean indicating that page tables should be cached in L2 cache. Example: qcom,iommu-domains { compatible = "qcom,iommu-domains"; qcom,iommu-domain1 { label = "lpass_secure"; qcom,iommu-contexts = <&lpass_q6_fw>; qcom,virtual-addr-pool = <0x00000000 0x0FFFFFFF 0xF0000000 0x0FFFFFFF>; }; qcom,iommu-domain2 { label = "lpass_audio"; qcom,iommu-contexts = <&lpass_audio_shared>; qcom,virtual-addr-pool = <0x10000000 0x0FFFFFFF>; }; qcom,iommu-domain3 { label = "lpass_video"; qcom,iommu-contexts = <&lpass_video_shared>; qcom,virtual-addr-pool = <0x20000000 0x0FFFFFFF>; }; }; Documentation/devicetree/bindings/fb/mdss-mdp.txt +1 −0 Original line number Diff line number Diff line Loading @@ -6,6 +6,7 @@ MDSS which manage all data paths to different panel interfaces. Required properties - compatible : Must be "qcom,mdss_mdp" - "qcom,mdss_mdp3" for mdp3 - reg : offset and length of the register set for the device. - reg-names : names to refer to register sets related to this device - interrupts : Interrupt associated with MDSS. Loading Loading
Documentation/devicetree/bindings/arm/msm/limits_supply_lm.txt 0 → 100644 +37 −0 Original line number Diff line number Diff line PMIC supply(S1) current limiting driver(SUPPLY_LM) ===================================== This driver is a current limit management module to help manage instantaneous peak current drawn by multiple subsystems on shared supply. The inputs to the mitigation algorithm are current states of different subsystems sharing this supply like cpu frequency, gpu frequency, number of cores online, soc temperature, core leakage, and modem state. It throttles cpu frequency and limits number of online cores to reduce the dynamic current so as to keep the total current drawn from supply in safe limits. The device tree parameters for SUPPLY_LM driver are: Required parameters: - compatible : Must be "qcom,supply-lm" - interrupts : SUPPLY_LM modem to apps interrupt details. - reg : Base addresses of the SUPPLY_LM modem interrupt data and its size in bytes. - reg-names : Name of SUPPLY_LM modem register in reg node. - qcom,supply-lm-very-hot-temp-range : SUPPLY_LM very hot temperature range info. It expects trigger and clear thresholds in order. - qcom,supply-lm-hot-temp-range : SUPPLY_LM hot temperature range info. It expects trigger and clear thresholds in order. - gpu-dev-opp: Phandle for gpu dev. Example: qcom,supply-lm { compatible = "qcom,supply-lm"; interrupts = <0 133 4>; reg = <0x01946000 0x8>; /* TCSR_TCSR_S1LM_MODEM_TO_APPS_INT and * TCSR_TCSR_S1LM_MODEM_TO_APPS_INT_DATA */ reg-names = "intr_reg"; qcom,supply-lm-very-hot-temp-range = <75 72>; qcom,supply-lm-hot-temp-range = <65 62>; gpu-dev-opp = <&msm_gpu>; };
Documentation/devicetree/bindings/arm/msm/lpm-workarounds.txt 0 → 100644 +55 −0 Original line number Diff line number Diff line * LPM Workarounds The required properties are: - compatible: "qcom,lpm-workarounds" The optional properties are: - reg: The physical address and the size of the l1_l2_gcc and l2_pwr_sts regitsters of performance cluster. - reg-names: "l2_pwr_sts" - string to identify l2_pwr_sts physical address. "l1_l2_gcc" - string to identify l1_l2_gcc physical address. - qcom,lpm-wa-cx-turbo-unvote: Indicates the workaround to unvote CX turbo vote when system is coming out of rpm assisted power collaspe. lpm-cx-supply is required if this is present. - lpm-cx-supply: will hold handle for CX regulator supply which is used to unvote. - qcom,lpm-wa-skip-l2-spm: Due to a hardware bug on 8939 and 8909, secure world needs to disable and enable L2 SPM to get the proper context in secure watchdog bite cases. With this workaround there is a race in programming L2 SPM between HLOS and secure world. This leads to stability issues. To avoid this program L2 SPM only in secure world based on the L2 mode flag passed. Set lpm-wa-skip-l2-spm node if this is required. - qcom,lpm-wa-dynamic-clock-gating: Due to a hardware bug on 8952, L1/L2 dynamic clock gating needs to be enabled by software for performance cluster cores and L2. Set lpm-wa-dynamic-clock-gating node if this workaround is required. - qcom,cpu-offline-mask: Dynamic clock gating should be enabled when cluster is in L2 PC. Each bit of cpu-offline-mask lists the cpu no. to hotplug by KTM driver. - qcom,non-boot-cpu-index: will hold index of non boot cluster cpu. - qcom,l1-l2-gcc-secure: indicates L1/L2 clock enabling register is secure. Example: qcom,lpm-workarounds { compatible = "qcom,lpm-workarounds"; reg = <0x0B011018 0x4>, <0x0B011088 0x4>; reg-names = "l2-pwr-sts", "l1-l2-gcc"; lpm-cx-supply = <&pm8916_s2_corner>; qcom,lpm-wa-cx-turbo-unvote; qcom,lpm-wa-skip-l2-spm; qcom,lpm-wa-dynamic-clock-gating; qcom,cpu-offline-mask = "0xF"; qcom,non-boot-cpu-index = <4>; }
Documentation/devicetree/bindings/arm/msm/msm.txt +5 −0 Original line number Diff line number Diff line Loading @@ -110,6 +110,9 @@ SoCs: - MDM9607 compatible = "qcom,mdm9607" - MSM8909 compatible = "qcom,apq8009" Generic board variants: - CDP device: Loading Loading @@ -278,3 +281,5 @@ compatible = "qcom,mdmcalifornium-rumi" compatible = "qcom,mdmcalifornium-sim" compatible = "qcom,mdmcalifornium-cdp" compatible = "qcom,mdmcalifornium-mtp" compatible = "qcom,apq8009-cdp" compatible = "qcom,apq8009-mtp"
Documentation/devicetree/bindings/arm/msm/msm_iommu_domains.txt 0 → 100644 +50 −0 Original line number Diff line number Diff line IOMMU Domains An IOMMU domain is a collection of IOMMU context banks and an optional virtual address space that is to be used with the domain. Domains that are defined will be created at bootup and associated with an iommu group. Clients can then refer to the iommu group and perform operations on the iommu group instead of individual devices/contexts. Required properties - compatible: "qcom,iommu-domains" - At least one child that defines a domain is required with the following properties: - label: Name of the domain - qcom,iommu-contexts: List of phandles to context that belongs to this domain. Optional properties - qcom,virtual-addr-pool: List of <start_address size> pairs that define the virtual address space for this domain. - qcom,secure-domain: boolean indicating that this is a secure domain that is to be programmed by Trustzone. - qcom,l2-redirect: boolean indicating that page tables should be cached in L2 cache. Example: qcom,iommu-domains { compatible = "qcom,iommu-domains"; qcom,iommu-domain1 { label = "lpass_secure"; qcom,iommu-contexts = <&lpass_q6_fw>; qcom,virtual-addr-pool = <0x00000000 0x0FFFFFFF 0xF0000000 0x0FFFFFFF>; }; qcom,iommu-domain2 { label = "lpass_audio"; qcom,iommu-contexts = <&lpass_audio_shared>; qcom,virtual-addr-pool = <0x10000000 0x0FFFFFFF>; }; qcom,iommu-domain3 { label = "lpass_video"; qcom,iommu-contexts = <&lpass_video_shared>; qcom,virtual-addr-pool = <0x20000000 0x0FFFFFFF>; }; };
Documentation/devicetree/bindings/fb/mdss-mdp.txt +1 −0 Original line number Diff line number Diff line Loading @@ -6,6 +6,7 @@ MDSS which manage all data paths to different panel interfaces. Required properties - compatible : Must be "qcom,mdss_mdp" - "qcom,mdss_mdp3" for mdp3 - reg : offset and length of the register set for the device. - reg-names : names to refer to register sets related to this device - interrupts : Interrupt associated with MDSS. Loading