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Commit df696a6f authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge remote branch 'nouveau/for-airlied' into drm-next 

* nouveau/for-airlied:
  drm/nouveau: fix i2c-related init table handlers
  drm/nouveau: support init table i2c device identifier 0x81
  drm/nouveau: ensure we've parsed i2c table entry for INIT_*I2C* handlers
  drm/nouveau: display error message for any failed init table opcode
  drm/nouveau: fix init table handlers to return proper error codes
  drm/nv50: support fractional feedback divider on newer chips
  drm/nv50: fix monitor detection on certain chipsets
  drm/nv50: store full dcb i2c entry from vbios
  drm/nv50: fix suspend/resume with DP outputs
  drm/nv50: output calculated crtc pll when debugging on
  drm/nouveau: dump pll limits entries when debugging is on
  drm/nouveau: bios parser fixes for eDP boards
  drm/nouveau: fix a nouveau_bo dereference after it's been destroyed
  drm/nv40: remove some completed ctxprog TODOs
  drm/nv04: Implement missing nv04 PGRAPH methods in software.
  drm/nouveau: Use 0x5f instead of 0x9f as imageblit on original NV10.
parents 5d9b7e2d 893887ed

drivers/gpu/drm/nouveau/Makefile

+2 −1
Original line number Diff line number Diff line
@@ -22,7 +22,8 @@ nouveau-y := nouveau_drv.o nouveau_state.o nouveau_channel.o nouveau_mem.o \ 
             nv50_cursor.o nv50_display.o nv50_fbcon.o \

             nv04_dac.o nv04_dfp.o nv04_tv.o nv17_tv.o nv17_tv_modes.o \

             nv04_crtc.o nv04_display.o nv04_cursor.o nv04_fbcon.o \

             nv17_gpio.o nv50_gpio.o

             nv17_gpio.o nv50_gpio.o \

	     nv50_calc.o



nouveau-$(CONFIG_DRM_NOUVEAU_DEBUG) += nouveau_debugfs.o

nouveau-$(CONFIG_COMPAT) += nouveau_ioc32.o

drivers/gpu/drm/nouveau/nouveau_bios.c

+327 −173

File changed.

Preview size limit exceeded, changes collapsed.

drivers/gpu/drm/nouveau/nouveau_bios.h

+1 −0
Original line number Diff line number Diff line
@@ -35,6 +35,7 @@ 
#define DCB_LOC_ON_CHIP 0



struct dcb_i2c_entry {

	uint32_t entry;

	uint8_t port_type;

	uint8_t read, write;

	struct nouveau_i2c_chan *chan;

drivers/gpu/drm/nouveau/nouveau_bo.c

+1 −1
Original line number Diff line number Diff line
@@ -160,11 +160,11 @@ nouveau_bo_new(struct drm_device *dev, struct nouveau_channel *chan, 
	ret = ttm_bo_init(&dev_priv->ttm.bdev, &nvbo->bo, size,

			  ttm_bo_type_device, &nvbo->placement, align, 0,

			  false, NULL, size, nouveau_bo_del_ttm);

	nvbo->channel = NULL;

	if (ret) {

		/* ttm will call nouveau_bo_del_ttm if it fails.. */

		return ret;

	}

	nvbo->channel = NULL;



	spin_lock(&dev_priv->ttm.bo_list_lock);

	list_add_tail(&nvbo->head, &dev_priv->ttm.bo_list);

drivers/gpu/drm/nouveau/nouveau_drv.h

+6 −0
Original line number Diff line number Diff line
@@ -1170,6 +1170,12 @@ int nv17_gpio_set(struct drm_device *dev, enum dcb_gpio_tag tag, int state); 
int nv50_gpio_get(struct drm_device *dev, enum dcb_gpio_tag tag);

int nv50_gpio_set(struct drm_device *dev, enum dcb_gpio_tag tag, int state);



/* nv50_calc. */

int nv50_calc_pll(struct drm_device *, struct pll_lims *, int clk,

		  int *N1, int *M1, int *N2, int *M2, int *P);

int nv50_calc_pll2(struct drm_device *, struct pll_lims *,

		   int clk, int *N, int *fN, int *M, int *P);



#ifndef ioread32_native

#ifdef __BIG_ENDIAN

#define ioread16_native ioread16be