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Commit de725dec authored by Peter Zijlstra's avatar Peter Zijlstra Committed by Ingo Molnar
Browse files

perf, x86: Fix handle_irq return values 



Now that we rely on the number of handled overflows, ensure all
handle_irq implementations actually return the right number.

Signed-off-by: default avatarPeter Zijlstra <a.p.zijlstra@chello.nl>
Signed-off-by: default avatarDon Zickus <dzickus@redhat.com>
Cc: peterz@infradead.org
Cc: robert.richter@amd.com
Cc: gorcunov@gmail.com
Cc: fweisbec@gmail.com
Cc: ying.huang@intel.com
Cc: ming.m.lin@intel.com
Cc: eranian@google.com
LKML-Reference: <1283454469-1909-4-git-send-email-dzickus@redhat.com>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent 2e556b5b

arch/x86/kernel/cpu/perf_event_intel.c

+7 −2
Original line number Diff line number Diff line
@@ -713,6 +713,7 @@ static int intel_pmu_handle_irq(struct pt_regs *regs) 
	struct cpu_hw_events *cpuc;

	int bit, loops;

	u64 status;

	int handled = 0;



	perf_sample_data_init(&data, 0);
@@ -743,12 +744,16 @@ again: 
	/*

	 * PEBS overflow sets bit 62 in the global status register

	 */

	if (__test_and_clear_bit(62, (unsigned long *)&status))

	if (__test_and_clear_bit(62, (unsigned long *)&status)) {

		handled++;

		x86_pmu.drain_pebs(regs);

	}



	for_each_set_bit(bit, (unsigned long *)&status, X86_PMC_IDX_MAX) {

		struct perf_event *event = cpuc->events[bit];



		handled++;



		if (!test_bit(bit, cpuc->active_mask))

			continue;
@@ -770,7 +775,7 @@ again: 


done:

	intel_pmu_enable_all(0);

	return 1;

	return handled;

}



static struct event_constraint *

arch/x86/kernel/cpu/perf_event_p4.c

+1 −1
Original line number Diff line number Diff line
@@ -692,7 +692,7 @@ static int p4_pmu_handle_irq(struct pt_regs *regs) 
		inc_irq_stat(apic_perf_irqs);

	}



	return handled > 0;

	return handled;

}



/*