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Commit de1fc5c6 authored by Greg Ungerer's avatar Greg Ungerer
Browse files

m68knommu: fix 5249 ColdFire UART setup 



The ICR registers of the 5249 ColdFire processor are 8bits, not 32bits.
Fix the read/write of these register to be the correct size.

Signed-off-by: default avatarGreg Ungerer <gerg@uclinux.org>
parent 4ce2cba4

arch/m68knommu/platform/5249/config.c

+2 −2
Original line number Diff line number Diff line
@@ -51,11 +51,11 @@ static struct platform_device *m5249_devices[] __initdata = { 
static void __init m5249_uart_init_line(int line, int irq)

{

	if (line == 0) {

		writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);

		writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);

		writeb(irq, MCFUART_BASE1 + MCFUART_UIVR);

		mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1);

	} else if (line == 1) {

		writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);

		writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);

		writeb(irq, MCFUART_BASE2 + MCFUART_UIVR);

		mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2);

	}