Loading include/uapi/media/msmb_ispif.h +3 −13 Original line number Diff line number Diff line Loading @@ -36,6 +36,7 @@ enum msm_ispif_intftype { #define RDI1_MASK (1 << RDI1) #define RDI2_MASK (1 << RDI2) enum msm_ispif_vc { VC0, VC1, Loading Loading @@ -88,8 +89,10 @@ struct msm_ispif_pack_cfg { int pixel_swap_en; enum msm_ispif_pixel_odd_even even_odd_sel; enum msm_ispif_pixel_pack_mode pack_mode; }; struct msm_ispif_params_entry { enum msm_ispif_vfe_intf vfe_intf; enum msm_ispif_intftype intftype; Loading @@ -101,18 +104,10 @@ struct msm_ispif_params_entry { uint16_t crop_end_pixel; }; struct msm_ispif_right_param_entry { enum msm_ispif_cid cids[MAX_CID_CH_v2]; enum msm_ispif_csid csid; }; struct msm_ispif_param_data_ext { uint32_t num; struct msm_ispif_params_entry entries[MAX_PARAM_ENTRIES]; struct msm_ispif_pack_cfg pack_cfg[CID_MAX]; struct msm_ispif_right_param_entry right_entries[MAX_PARAM_ENTRIES]; uint32_t stereo_enable; uint16_t line_width[VFE_MAX]; }; struct msm_ispif_param_data { Loading Loading @@ -144,7 +139,6 @@ enum ispif_cfg_type_t { ISPIF_ENABLE_REG_DUMP, ISPIF_SET_VFE_INFO, ISPIF_CFG2, ISPIF_CFG_STEREO, }; struct ispif_cfg_data { Loading @@ -165,10 +159,6 @@ struct ispif_cfg_data_ext { #define ISPIF_RDI_PACK_MODE_SUPPORT 1 #define ISPIF_3D_SUPPORT 1 #define ISPIF_LINE_WIDTH_SUPPORT 1 #define VIDIOC_MSM_ISPIF_CFG \ _IOWR('V', BASE_VIDIOC_PRIVATE, struct ispif_cfg_data) Loading Loading
include/uapi/media/msmb_ispif.h +3 −13 Original line number Diff line number Diff line Loading @@ -36,6 +36,7 @@ enum msm_ispif_intftype { #define RDI1_MASK (1 << RDI1) #define RDI2_MASK (1 << RDI2) enum msm_ispif_vc { VC0, VC1, Loading Loading @@ -88,8 +89,10 @@ struct msm_ispif_pack_cfg { int pixel_swap_en; enum msm_ispif_pixel_odd_even even_odd_sel; enum msm_ispif_pixel_pack_mode pack_mode; }; struct msm_ispif_params_entry { enum msm_ispif_vfe_intf vfe_intf; enum msm_ispif_intftype intftype; Loading @@ -101,18 +104,10 @@ struct msm_ispif_params_entry { uint16_t crop_end_pixel; }; struct msm_ispif_right_param_entry { enum msm_ispif_cid cids[MAX_CID_CH_v2]; enum msm_ispif_csid csid; }; struct msm_ispif_param_data_ext { uint32_t num; struct msm_ispif_params_entry entries[MAX_PARAM_ENTRIES]; struct msm_ispif_pack_cfg pack_cfg[CID_MAX]; struct msm_ispif_right_param_entry right_entries[MAX_PARAM_ENTRIES]; uint32_t stereo_enable; uint16_t line_width[VFE_MAX]; }; struct msm_ispif_param_data { Loading Loading @@ -144,7 +139,6 @@ enum ispif_cfg_type_t { ISPIF_ENABLE_REG_DUMP, ISPIF_SET_VFE_INFO, ISPIF_CFG2, ISPIF_CFG_STEREO, }; struct ispif_cfg_data { Loading @@ -165,10 +159,6 @@ struct ispif_cfg_data_ext { #define ISPIF_RDI_PACK_MODE_SUPPORT 1 #define ISPIF_3D_SUPPORT 1 #define ISPIF_LINE_WIDTH_SUPPORT 1 #define VIDIOC_MSM_ISPIF_CFG \ _IOWR('V', BASE_VIDIOC_PRIVATE, struct ispif_cfg_data) Loading